DS1342U+ Maxim Integrated Products, DS1342U+ Datasheet - Page 14

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DS1342U+

Manufacturer Part Number
DS1342U+
Description
IC RTC I2C W/ALARM 8USOP
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/Alarmr
Datasheet

Specifications of DS1342U+

Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Low-Current I
See Figure 6 for an I
14
Figure 6. I
A)
B)
C)
D)
TYPICAL I
EXAMPLE I
START
DS1341/DS1342s’ slave address is D0h and cannot
be modified by the user. When the R/W bit is 0 (such
as in D0h), the master is indicating it writes data to the
slave. If R/W = 1 (D1h in this case), the master is indi-
cating it wants to read from the slave. If an incorrect
slave address is written, the DS1341/DS1342 assume
the master is communicating with another I
and ignore the communication until the next START
condition is sent.
Memory Address: During an I
master must transmit a memory address to identify
the memory location where the slave is to store the
data. The memory address is always the second byte
transmitted during a write operation following the
slave address byte.
Writing a Single Byte to a Slave: The master must
generate a START condition, write the slave address
byte (R/W = 0), write the memory address, write
the byte of data, and generate a STOP condition.
Remember the master must read the slave’s acknowl-
edgment during all byte write operations.
SINGLE BYTE WRITE
-WRITE CONTROL REGISTER
TO 18h
SINGLE BYTE READ
-READ CONTROL REGISTER
MULTIBYTE WRITE
-WRITE DATE REGISTER
TO "02" AND MONTH
REGISTER TO "11"
MULTIBYTE READ
-READ ALARM 2 HOURS
AND DATE VALUES
2
C WRITE TRANSACTION
2
MSB
C TRANSACTIONS
1
2
C Transactions
1
0
ADDRESS
SLAVE
1
2
C communication example.
0
START
START
START 1 1 0 1 0 0 0 0
START 1 1 0 1 0 0 0 0
0
1 1 0 1 0 0 0 0
1 1 0 1 0 0 0 0
0
I
D0h
D0h
D0h
D0h
READ/
WRITE
R/W
LSB
2
C Communication
2
2
C write operation, the
SLAVE
C RTCs for High-ESR Crystals
ACK
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
MSB
b7
0 0 0 0 1 1 1 0
0 0 0 0 1 1 1 0
0 0 0 0 0 1 0 0
0 0 0 0 1 1 0 0
b6
0Eh
0Eh
04h
0Ch
2
C device
b5
REGISTER ADDRESS
b4
SLAVE
SLAVE
SLAVE
SLAVE
ACK
ACK
ACK
ACK
b3
0 0 0 0 0 0 1 0
0 0 0 1 1 0 0 0
REPEATED
REPEATED
b2
START
START
18h
02h
b1
Writing Multiple Bytes to a Slave: To write multiple
bytes to a slave, the master generates a START con-
dition, writes the slave address byte (R/W = 0), writes
the starting memory address, writes multiple data
bytes, and generates a STOP condition.
Reading a Single Byte from a Slave: Unlike the write
operation that uses the specified memory address
byte to define where the data is to be written, the read
operation occurs at the present value of the memory
address counter. To read a single byte from the slave,
the master generates a START condition, writes the
slave address byte with R/W = 1, reads the data byte
with a NACK to indicate the end of the transfer, and
generates a STOP condition. However, since requir-
ing the master to keep track of the memory address
counter is impractical, use the method for manipulat-
ing the address counter for reads.
Manipulating the Address Counter for Reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the mas-
ter generates a START condition, writes the slave
address byte (R/W = 0), writes the memory address
where it desires to read, generates a repeated START
condition, writes the slave address byte (R/W = 1),
LSB
b0
1 1 0 1 0 0 0 1
1 1 0 1 0 0 0 1
SLAVE
SLAVE
ACK
ACK
D1h
D1h
SLAVE
ACK
STOP
0 0 0 1 0 0 0 1
MSB
b7
SLAVE
SLAVE
ACK
11h
ACK
b6
b5
VALUE
VALUE
DATA
SLAVE
DATA
ACK
b4
DATA
b3
STOP
MASTER
MASTER
NACK
ACK
b2
b1
STOP
VALUE
LSB
DATA
b0
SLAVE
ACK
MASTER
NACK
STOP
STOP

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