DS1342U+ Maxim Integrated Products, DS1342U+ Datasheet - Page 8

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DS1342U+

Manufacturer Part Number
DS1342U+
Description
IC RTC I2C W/ALARM 8USOP
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/Alarmr
Datasheet

Specifications of DS1342U+

Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Low-Current I
When an external clock reference is used, the input
from CLKIN/INTA is divided down to 1Hz by the divi-
sor selected by the CLKSEL[2:1] bits. The 1Hz from the
divider (Ext-1Hz, see the Functional Diagram) is used to
correct the 1Hz that is derived from the 32.768kHz oscil-
lator (Osc-1Hz). As Osc-1Hz drifts in relation to Ext-1Hz,
Osc-1Hz is digitally adjusted.
As shown in the Functional Diagram, the three highest
frequencies driving the SQW/INTB pin are derived from
the uncorrected oscillator, while the 1Hz output is derived
from the adjusted Osc-1Hz signal.
Conceptually, the circuit can be thought of as two 1Hz
signals, one derived from the internal oscillator and the
other derived from the external reference clock, with the
oscillator-derived 1Hz signal being locked to the 1Hz sig-
nal derived from the external reference clock. The edges
Figure 3. Loss and Reacquisition of External Reference Clock
Figure 4. Drift and Adjustment of Internal 1Hz to External Reference Clock
8
FROM EXTERNAL REFERENCE
FROM EXTERNAL REFERENCE
FROM OSCILLATOR
FROM OSCILLATOR
OSC-1Hz
OSC-1Hz
EXT-1Hz
EXT-1Hz
External Synchronization
SKEW
CURRENT LOCK
2
C RTCs for High-ESR Crystals
BREAK IN EXTERNAL REFERENCE SIGNAL
DRIFT AFTER N CYCLES
of the 1Hz signals do not need to be aligned with each
other. While the external clock source is present and
within tolerance, the Ext-1Hz and Osc-1Hz maintain their
existing lock, regardless of their edge alignment, with
periodic correction of the Osc-1Hz signal. If the external
signal is lost and then regained sometime later, the sig-
nals relock with whatever new alignment exists (Figure 3).
The Ext-1Hz is used by the device as long as it is within
tolerance, which is about 0.8% of Osc-1Hz. While Ext-
1Hz is within tolerance, the skew between the two sig-
nals could shift until a change of approximately 7.8ms
accumulates, after which the Osc-1Hz signal is adjusted
(Figure 4). The adjustment is accomplished by digitally
adjusting the 32kHz oscillator divider chain.
If the difference between Ext-1Hz and Osc-1Hz is greater
than approximately 0.8%, Osc-1Hz runs unadjusted (see
Figure 3) and the loss of signal (LOS) is set, provided
SKEW
SHIFTED BACK TO CURRENT LOCK

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