AD7920BRMZ Analog Devices Inc, AD7920BRMZ Datasheet - Page 15

IC ADC 12BIT 250KSPS 8-MSOP

AD7920BRMZ

Manufacturer Part Number
AD7920BRMZ
Description
IC ADC 12BIT 250KSPS 8-MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7920BRMZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
250k
Number Of Converters
1
Power Dissipation (max)
15mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Resolution (bits)
12bit
Sampling Rate
250kSPS
Input Channel Type
Differential
Supply Current
3mA
Digital Ic Case Style
SOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7920CBZ - BOARD EVALUATION FOR AD7920
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7920BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Table 6 provides typical performance data with various
references used as a V
room temperature, under the same setup conditions.
Table 6. AD7920 Typical Performance for Various Voltage
References IC
Reference Tied to V
AD780 @ 3 V
REF193
AD780 @ 2.5 V
REF192
REF43
ANALOG INPUT
Figure 18 shows an equivalent circuit of the analog input
structure of the AD7910/AD7920. The two diodes, D1 and D2,
provide ESD protection for the analog input. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 300 mV. This causes these diodes to
become forward biased and start conducting current into the
substrate. The maximum current these diodes can conduct
without causing irreversible damage to the parties is 10 mA.
Capacitor C1 in Figure 18 is typically about 6 pF and can be
attributed primarily to pin capacitance. Resistor R1 is a lumped
component made up of the on resistance of a switch. This
resistor is typically about 100 Ω. Capacitor C2 is the ADC
sampling capacitor and has a capacitance of 20 pF typically. For
ac applications, removing high frequency components from the
analog input signal is recommended by use of a band-pass filter
on the relevant analog input pin. In applications where
harmonic distortion and signal-to-noise ratio are critical, the
analog input should be driven from a low impedance source.
Large source impedances significantly affect the ac performance
of the ADC. This can necessitate the use of an input buffer
amplifier. The choice of the op amp is a function of the
particular application.
0V TO V
680nF
INPUT
1.2mA
DD
V
V
GND
DD
IN
0.1
Figure 17. REF193 as Power Supply
μ
AD7910/
AD7920
F
DD
DD
TANT
source for a 100 kHz input tone at
1
3V
μ
SDATA
F
SCLK
INTERFACE
AD7920 SNR Performance (dB)
72.65
72.35
72.5
72.2
72.6
CS
SERIAL
REF193
10
μ
F
μ
0.1
C/
μ
μ
P
F
5V
SUPPLY
Rev. C | Page 15 of 24
Table 7 provides some typical performance data with various op
amps used as the input buffer for a 100 kHz input tone at room
temperature, under the same setup conditions.
Table 7. AD7920 Typical Performance for Various Input
Buffers, V
Op Amp in the Input Buffer
AD711
AD797
AD845
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
Figure 12).
DIGITAL INPUTS
The digital inputs applied to the AD7910/AD7920 are not limited
by the maximum ratings that limit the analog input. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
V
AD7910/AD7920 were operated with a V
levels could be used on the digital inputs. However, it is important
to note that the data output on SDATA still have 3 V logic levels
when V
restricted by the V
sequencing issues are avoided. If CS or SCLK is applied before
V
inputs if a signal greater than 0.3 V were applied prior to V
DD
DD
, there is no risk of latch-up as there would be on the analog
+ 0.3 V limit as on the analog input. For example, if the
DD
V
= 3 V. Another advantage of SCLK and CS not being
DD
IN
= 3 V
Figure 18. Equivalent Analog Input Circuit
6pF
C1
DD
+ 0.3 V limit is that power supply
CONVERSION PHASE—SWITCH OPEN
TRACK PHASE—SWITCH CLOSED
V
DD
D1
D2
AD7920 SNR Performance (dB)
72.3
72.5
71.4
AD7910/AD7920
R1
DD
of 3 V, then 5 V logic
20pF
C2
DD
.

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