AD7328BRUZ Analog Devices Inc, AD7328BRUZ Datasheet - Page 23

IC ADC 12BIT+ SAR 8CHAN 20TSSOP

AD7328BRUZ

Manufacturer Part Number
AD7328BRUZ
Description
IC ADC 12BIT+ SAR 8CHAN 20TSSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7328BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
Number Of Bits
12
Sampling Rate (per Second)
1M
Number Of Converters
1
Power Dissipation (max)
30mW
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
13bit
Sampling Rate
1MSPS
Input Channel Type
Pseudo Differential, Single Ended
Supply Current
900µA
Digital Ic Case Style
TSSOP
No. Of Pins
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7328CBZ - BOARD EVALUATION FOR AD7328
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Table 11. Power Mode Selection
PM1
1
1
0
0
Table 12. Sequencer Selection
SEQ1
0
0
1
1
PM0
1
0
1
0
SEQ2
0
1
0
1
Description
The channel sequencer is not used. The analog channel, selected by programming the ADD2 to ADD0 bits in the control
register, selects the next channel for conversion.
Uses the sequence of channels that were previously programmed in the sequence register for conversion. The AD7328
starts converting on the lowest channel in the sequence. The channels are converted in ascending order. If uninterrupted,
the AD7328 keeps converting the sequence. The range for each channel defaults to the range previously written into the
corresponding range register.
This configuration is used in conjunction with the channel address bits in the control register. This allows continuous conversions
on a consecutive sequence of channels, from Channel 0 through a final channel selected by the channel address bits in the
control register. The range for each channel defaults to the range previously written into the corresponding range register.
The channel sequencer is not used. The analog channel, selected by programming the ADD2 bit to ADD0 bit in the control
register, selects the next channel for conversion.
Description
Full shutdown mode. In this mode, all internal circuitry on the AD7328 is powered down. Information in the control
register is retained when the AD7328 is in full shutdown mode.
Autoshutdown mode. The AD7328 enters autoshutdown on the 15
updated. All internal circuitry is powered down in autoshutdown.
Autostandby mode. In this mode, all internal circuitry is powered down, excluding the internal reference. The AD7328
enters autostandby mode on the 15
Normal mode. All internal circuitry is powered up at all times.
th
SCLK rising edge after the control register is updated.
Rev. B | Page 23 of 36
th
SCLK rising edge when the control register is
AD7328

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