LTC1273BCSW Linear Technology, LTC1273BCSW Datasheet - Page 12

• Manufacturer Part Number: LTC1273BCSW
• Description: IC A/D CONV 12BIT SAMPLNG 24SOIC
• Manufacturer: Linear Technology

Specifications of LTC1273BCSW

• Number Of Bits: 12
• Sampling Rate (per Second): 300k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 75mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC1273BCS

LTC1273
LTC1275/LTC1276
A
Figure 5 shows the IMD performance at a 30kHz input.
Peak Harmonic or Spurious Noise
The peak harmonic or spurious noise is the largest spec-
tral component excluding the input signal and DC. This
value is expressed in decibels relative to the RMS value of
a full scale input signal.
Full Power and Full Linear Bandwidth
The full power bandwidth is that input frequency at which
the amplitude of the reconstructed fundamental is re-
duced by 3dB for a full scale input signal.
The full linear bandwidth is the input frequency at which
the S/(N + D) has dropped to 68dB (11 effective bits). The
LTC1273/LTC1275/LTC1276 have been designed to opti-
mize input bandwidth, allowing ADCs to undersample
input signals with frequencies above the converters’ Nyquist
Frequency. The noise floor stays very low at high frequen-
cies; S/(N + D) becomes dominated by distortion at
frequencies far beyond Nyquist.
Driving the Analog Input
The analog inputs of the LTC1273/LTC1275/LTC1276 are
easy to drive. They draw only one small current spike while
charging the sample-and-hold capacitor at the end of
conversion. During conversion the analog input draws no
current. The only requirement is that the amplifier driving
12
PPLICATI
–100
–120
–60
–20
–40
Figure 5. Intermodulation Distortion Plot
–80
0
0
O
20
U
40
S
FREQUENCY (kHz)
60
I FOR ATIO
U
80
f
f
f
SAMPLE
IN1
IN2
100
= 29.37kHz
= 32.446kHz
120
= 300kHz
LTC1273/75/76 • F05
W
140
160
U
the analog input must settle after the small current spike
before the next conversion starts. Any op amp that settles
in 600ns to small current transients will allow maximum
speed operation. If slower op amps are used, more settling
time can be provided by increasing the time between
conversions. Suitable devices capable of driving the ADCs’
A
LT1223 and LT1224 op amps.
The analog input tolerates source resistance very well.
Here again, the only requirement is that the analog input
must settle before the next conversion starts. For larger
source resistance, full DC accuracy can be obtained if
more time is allowed between conversions. For more
information, see the Acquisition Time vs Source Resis-
tance curve in the Typical Performance Characteristics
section. For optimum frequency domain performance
[e.g., S/(N + D)], keep the source resistance below 100Ω.
Internal Reference
The LTC1273/LTC1275/LTC1276 have an on-chip, tem-
perature compensated, curvature corrected, bandgap ref-
erence which is factory trimmed to 2.42V. It is internally
connected to the DAC and is available at pin 2 to provide
up to 1mA current to an external load.
For minimum code transition noise the reference output
should be decoupled with a capacitor to filter wideband
noise from the reference (10µF tantalum in parallel with a
0.1µF ceramic).
In the LTC1275, the V
normal value with a DAC or other means to provide input
span adjustment or to improve the reference temperature
drift. Figure 6 shows an LT1006 op amp driving the
IN
±1.033V
INPUT RANGE
input include the LT1190/LT1191, LT1007, LT1220,
Figure 6. Driving the V
REF(OUT)
+
–
LT1006
REF
REF
pin can be driven above its
V
REF(OUT)
with the LT1006 Op Amp
≥ 2.45V
3Ω
10µF
LTC1273/75/76 • F06
A
V
AGND
LTC1275
IN
REF
127356fa