LTC2259CUJ-14#TRPBF Linear Technology, LTC2259CUJ-14#TRPBF Datasheet
LTC2259CUJ-14#TRPBF
Specifications of LTC2259CUJ-14#TRPBF
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LTC2259CUJ-14#TRPBF Summary of contents
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... An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 1. ...
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LTC2261-14 LTC2260-14/LTC2259-14 ABSOLUTE MAXIMUM RATINGS Supply Voltages ( ....................... –0. – Analog Input Voltage ( PAR/SER, SENSE) (Note 3) .......... –0. CS, + – ...
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... LTC2260CUJ-14#PBF LTC2260CUJ-14#TRPBF LTC2260IUJ-14#PBF LTC2260IUJ-14#TRPBF LTC2259CUJ-14#PBF LTC2259CUJ-14#TRPBF LTC2259IUJ-14#PBF LTC2259IUJ-14#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: For more information on tape and reel specifi ...
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LTC2261-14 LTC2260-14/LTC2259-14 ANALOG INPUT The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 5) A SYMBOL PARAMETER + – V Analog Input Range (A – A ...
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DIGITAL INPUTS AND OUTPUTS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER + – ENCODE INPUTS (ENC , ENC ) – Differential Encode Mode (ENC Not Tied to GND) V Differential Input Voltage ID V Common Mode Input ...
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LTC2261-14 LTC2260-14/LTC2259-14 POWER REQUIREMENTS range, otherwise specifi cations are SYMBOL PARAMETER CONDITIONS CMOS Output Modes: Full Data Rate and Double-Data Rate V Analog Supply Voltage (Note 10 Output Supply Voltage (Note 10 Analog ...
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TIMING CHARACTERISTICS range, otherwise specifi cations are at T SYMBOL PARAMETER Digital Data Outputs (LVDS Mode) t ENC to Data Delay D t ENC to CLKOUT Delay C t DATA to CLKOUT Skew SKEW Pipeline Latency SPI Port Timing (Note ...
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LTC2261-14 LTC2260-14/LTC2259-14 TIMING DIAGRAMS ANALOG INPUT – ENC + ENC D0_1 • • • D12_13 OF + CLKOUT – CLKOUT ANALOG INPUT – ENC + ENC + D0_1 – D0_1 • • • + D12_13 – D12_13 + OF – ...
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TIMING DIAGRAMS SCK SDI R/W SDO HIGH IMPEDANCE CS SCK SDI R/W SDO HIGH IMPEDANCE TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-14: Integral Non-Linearity (INL) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 ...
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LTC2261-14 LTC2260-14/LTC2259-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-14: 8k Point FFT 30MHz IN –1dBFS, 125Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 226114 G04 LTC2261-14: ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-14 Sample OVDD Rate, 5MHz Sine Wave Input, –1dB, 5pF on Each Data Output 45 3.5mA LVDS 1.75mA LVDS 1.8V CMOS 5 1.2V CMOS ...
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LTC2261-14 LTC2260-14/LTC2259-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2260-14: 8k Point FFT 70MHz IN –1dBFS, 105Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 226114 G25 LTC2260-14: Shorted ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2260-14: SNR vs SENSE 5MHz, –1dB 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 SENSE PIN (V) 226114 G35 LTC2259-14: 8k Point FFT ...
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LTC2261-14 LTC2260-14/LTC2259-14 TYPICAL PERFORMANCE CHARACTERISTICS LTC2259-14: SNR vs Input Frequency, –1dB, 2V Range, 80Msps 100 150 200 250 300 350 INPUT FREQUENCY (MHz) 226114 G49 LTC2259-14 Sample ...
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PIN FUNCTIONS operating modes. PAR/SER should be connected directly to ground or the V of the part and not be driven logic signal. V (Pins 9, 10, 40): 1.8V Analog Power Supply. Bypass DD to ground with ...
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LTC2261-14 LTC2260-14/LTC2259-14 PIN FUNCTIONS + D12) appear when CLKOUT is low. The odd data bits (D1, D3, D5, D7, D9, D11, D13) appear when CLKOUT – CLKOUT (Pin 27): Inverted Version of CLKOUT + CLKOUT (Pin 28): Data Output Clock. ...
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APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2261-14/LTC2260-14/LTC2259-14 are low power 14-bit 125Msps/105Msps/80Msps A/D converters that are powered by a single 1.8V supply. The analog inputs should be driven differentially. The encode input can be driven differentially, or single ended for lower ...
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LTC2261-14 LTC2260-14/LTC2259-14 APPLICATIONS INFORMATION DC level. At higher input frequencies a transmission line balun transformer (Figures has better balance, resulting in lower A/D distortion. Amplifi er Circuits Figure 7 shows the analog input being driven by a ...
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APPLICATIONS INFORMATION Reference The LTC2261-14/LTC2260-14/LTC2259-14 have an internal 1.25V voltage reference. For a 2V input range using the internal reference, connect SENSE to V range using the external reference, connect SENSE to ground. For a 2V input range with an ...
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LTC2261-14 LTC2260-14/LTC2259-14 APPLICATIONS INFORMATION Encode Input The signal quality of the encode inputs strongly affects the A/D noise performance. The encode inputs should be treated as analog signals—do not route them next to digital traces on the circuit board. There ...
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APPLICATIONS INFORMATION For applications where the sample rate needs to be changed quickly, the clock duty cycle stabilizer can be disabled. If the duty cycle stabilizer is disabled, care should be taken to make the sampling clock have a 50%(±5%) ...
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LTC2261-14 LTC2260-14/LTC2259-14 APPLICATIONS INFORMATION Phase Shifting the Output Clock In full-rate CMOS mode the data output bits normally change at the same time as the falling edge of CLKOUT + so the rising edge of CLKOUT can be used to ...
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APPLICATIONS INFORMATION Digital Output Randomizer Interference from the A/D digital outputs is sometimes unavoidable. Digital interference may be from capacitive or inductive coupling or coupling through the ground plane. Even a tiny coupling factor can cause unwanted tones in the ...
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LTC2261-14 LTC2260-14/LTC2259-14 APPLICATIONS INFORMATION The digital output is decoded at the receiver by inverting the odd bits (D1, D3, D5, D7, D9, D11, D13.) The alternate bit polarity mode is independent of the digital output ran- domizer—either, both or neither ...
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APPLICATIONS INFORMATION Serial Programming Mode To use the serial programming mode, PAR/SER should be tied to ground. The CS, SCK, SDI and SDO pins become a serial interface that program the A/D mode control registers. Data is written to a ...
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LTC2261-14 LTC2260-14/LTC2259-14 APPLICATIONS INFORMATION REGISTER A2: TIMING REGISTER (ADDRESS 02h Bits 7-4 Unused, Don’t Care Bits. Bit 3 CLKINV Output Clock Invert Bit 0 = Normal CLKOUT Polarity (As Shown in the Timing Diagrams ...
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APPLICATIONS INFORMATION REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h OUTTEST2 Bit 7-6 Unused, Don’t Care Bits. Bits 5-3 OUTTEST2:OUTTEST0 000 = Digital Output Test Patterns Off 001 = All Digital Outputs = 0 011 = All ...
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LTC2261-14 LTC2260-14/LTC2259-14 TYPICAL APPLICATIONS T2 MABAES0060 R9 10Ω • • R39 ANALOG INPUT 33.2Ω 1% R40 33.2Ω 1% R10 10Ω R15 100Ω C12 C13 0.1μF 1μF 28 LTC2261 Schematic SENSE C23 1μF R14 C51 1k 4.7pF C17 1μF C19 0.1μF ...
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TYPICAL APPLICATIONS Silkscreen Top Inner Layer 2 GND LTC2260-14/LTC2259-14 226114 TA03 226114 TA04 LTC2261-14 Top Side 226114 TA04 Inner Layer 3 226114 TA06 226114fa 29 ...
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LTC2261-14 LTC2260-14/LTC2259-14 TYPICAL APPLICATIONS Inner Layer 4 30 226114 TA07 Bottom Side 226114 TA09 Inner Layer 5 Power 226114 TA08 226114fa ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Fixed Gain 10V/V, 2.1nV√Hz Total Input Noise, 3mm × 3mm QFN-16 Package Dual Matched 4th Order LP Filters with Differential Drivers. Low Noise, Low Distortion Amplifi ers www.linear.com ● 226114fa LT 0909 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2008 ...