LTC2259CUJ-16#PBF Linear Technology, LTC2259CUJ-16#PBF Datasheet - Page 23

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LTC2259CUJ-16#PBF

Manufacturer Part Number
LTC2259CUJ-16#PBF
Description
IC ADC 16BIT 80MSPS 40QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2259CUJ-16#PBF

Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
201mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC2259CUJ-16#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
APPLICATIONS INFORMATION
GROUNDING AND BYPASSING
The LTC2259-16 requires a printed circuit board with a
clean unbroken ground plane. A multilayer board with an
internal ground plane in the fi rst layer beneath the ADC is
recommended. Layout for the printed circuit board should
ensure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital track alongside an analog signal track
or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the V
capacitors must be located as close to the pins as possible.
Of particular importance is the 0.1μF capacitor between
REFH and REFL. This capacitor should be on the same
side of the circuit board as the A/D, and as close to the
device as possible (1.5mm or less). Size 0402 ceramic
capacitors are recommended. The larger 2.2μF capacitor
between REFH and REFL can be somewhat further away.
REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h)
Bit 7-6
Bits 5-3
Bit 2
Bit 1
Bit 0
DD
D7
X
, OV
DD
, V
Unused, Don’t Care Bits.
OUTTEST2:OUTTEST0
000 = Digital Output Test Patterns Off
001 = Digital Outputs = 0000 0000 0000 00XX
011 = Digital Outputs = 1111 1111 1111 11XX
101 = Checkerboard Output Pattern. D15-D0 alternate between 0101 0101 0101 01XX and 1010 1010 1010 10XX.
111 = Alternating Output Pattern. D15-D0 alternate between 0000 0000 0000 00XX and 1111 1111 1111 11XX.
Note: Other bit combinations are not used. D1 and D0 are not controlled by the digital output test patterns.
ABP
0 = Alternate Bit Polarity Mode Off
1 = Alternate Bit Polarity Mode On
RAND
0 = Data Output Randomizer Mode Off
1 = Data Output Randomizer Mode On
TWOSCOMP Two’s Complement Mode Control Bit
0 = Offset Binary Data Format
1 = Two’s Complement Data Format
Note: ABP = 1 forces the output format to be offset binary.
CM
, V
D6
X
REF
, REFH and REFL pins. Bypass
Alternate Bit Polarity Mode Control Bit
Data Output Randomizer Mode Control Bit
OUTTEST2
D5
Digital Output Test Pattern Bits
OUTTEST1
D4
The V
as possible. To make space for this the capacitor on V
can be further away or on the back of the PC board. The
traces connecting the pins and bypass capacitors must be
kept short and should be made as wide as possible.
The analog inputs, encode signals, and digital outputs
should not be routed next to each other. Ground fi ll and
grounded vias should be used as barriers to isolate these
signals from each other.
HEAT TRANSFER
Most of the heat generated by the LTC2259-16 is transferred
from the die through the bottom-side exposed pad and
package leads onto the printed circuit board. For good
electrical and thermal performance, the exposed pad must
be soldered to a large grounded pad on the PC board. This
pad should be connected to the internal ground planes by
an array of vias.
OUTTEST0
D3
CM
capacitor should be located as close to the pin
ABP
D2
RAND
LTC2259-16
D1
TWOSCOMP
D0
23
225916f
REF

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