AD9237BCPZ-20 Analog Devices Inc, AD9237BCPZ-20 Datasheet

IC ADC 12BIT SGL 20MSPS 32LFCSP

AD9237BCPZ-20

Manufacturer Part Number
AD9237BCPZ-20
Description
IC ADC 12BIT SGL 20MSPS 32LFCSP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9237BCPZ-20

Data Interface
Parallel
Number Of Bits
12
Sampling Rate (per Second)
20M
Number Of Converters
3
Power Dissipation (max)
85mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
Resolution (bits)
12bit
Input Channel Type
Differential
Supply Voltage Range - Analogue
2.7V To 3.6V
Supply Voltage Range - Digital
2.25V To 3.6V
Supply Current
30.5mA
Sampling Rate
20MSPS
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
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Manufacturer
Quantity
Price
Part Number:
AD9237BCPZ-20
Manufacturer:
INFINEON
Quantity:
2 300
Part Number:
AD9237BCPZ-20
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
Ultralow power
SNR = 66 dBc to Nyquist at 65 MSPS
SFDR = 80 dBc to Nyquist at 65 MSPS
DNL = ±0.7 LSB
Differential input with 500 MHz bandwidth
Flexible analog input: 1 V p-p to 4 V p-p range
Offset binary, twos complement, or gray code data formats
Output enable pin
2-step power-down
Full power-down and sleep mode
Clock duty cycle stabilizer
APPLICATIONS
Ultrasound and medical imaging
Battery-powered instruments
Hand-held scope meters
Low cost digital oscilloscopes
Low power digital still cameras and copiers
Low power communications
GENERAL DESCRIPTION
The AD9237 is a family of monolithic, single 3 V supply, 12-bit,
20 MSPS/40 MSPS/65 MSPS analog-to-digital converters
(ADC). This family features a high performance sample-and-
hold amplifier (SHA) and voltage reference. The AD9237 uses a
multistage differential pipelined architecture with output error
correction logic to provide 12-bit accuracy at 20 MSPS/
40 MSPS/65 MSPS data rates and guarantees no missing codes
over the full operating temperature range.
With significant power savings over previously available ADCs,
the AD9237 is suitable for applications in imaging and medical
ultrasound.
Fabricated on an advanced CMOS process, the AD9237 is
available in a 32-lead LFCSP and is specified over the industrial
temperature range (−40°C to +85°C).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
85 mW at 20 MSPS
135 mW at 40 MSPS
190 mW at 65 MSPS
12-Bit, 20 MSPS/40 MSPS/65 MSPS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113 © 2005–2010 Analog Devices, Inc. All rights reserved.
MODE2
PRODUCT HIGHLIGHTS
1. Operating at 65 MSPS, the AD9237 consumes a low 190 mW
2. Power scaling reduces the operating power further when
3. The AD9237 operates from a single 3 V power supply and
4. The patented SHA input maintains excellent performance
5. The AD9237 is optimized for selectable and flexible input
6. An output enable pin allows for multiplexing of the outputs.
7. Two-step power-down supports a standby mode in addition
8. The OTR output bit indicates when the signal is beyond the
9. The clock duty cycle stabilizer (DCS) maintains converter
SENSE
REFB
VREF
REFT
3 V Low Power A/D Converter
VIN+
VIN–
at 65 MSPS, 135 mW at 40 MSPS, and 85 mW at 20 MSPS.
running at lower speeds.
features a separate digital output driver supply to
accommodate 2.5 V and 3.3 V logic families.
for input frequencies beyond Nyquist and can be configured
for single-ended or differential operation.
ranges from 1 V p-p to 4 V p-p.
to a power-down mode.
selected input range.
performance over a wide range of clock pulse widths.
SHA
SELECT
REF
FUNCTIONAL BLOCK DIAGRAM
AGND
AVDD
A/D
MDAC1
0.5V
DUTY CYCLE
STABILIZER
AD9237
CLOCK
4
CLK
Figure 1.
CORRECTION LOGIC
OUTPUT BUFFERS
10-STAGE
PIPELINE
PDWN
1 1/2-BIT
15
12
DRVDD
SELECT
MODE
MODE
AD9237
www.analog.com
A/D
DGND
3
OE
OTR
D11
D0

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AD9237BCPZ-20 Summary of contents

Page 1

FEATURES Ultralow power MSPS 135 MSPS 190 MSPS SNR = 66 dBc to Nyquist at 65 MSPS SFDR = 80 dBc to Nyquist at 65 MSPS DNL = ±0.7 LSB ...

Page 2

AD9237 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 DC Specifications ......................................................................... 3 Digital Specifications ................................................................... 4 AC Specifications ...

Page 3

SPECIFICATIONS DC SPECIFICATIONS AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate p-p differential input, −0.5 dBFS input, 1.0 V internal reference, T unless otherwise noted. Table 1. Parameter RESOLUTION ACCURACY No Missing Codes Guaranteed Offset ...

Page 4

AD9237 DIGITAL SPECIFICATIONS Table 2. Parameter LOGIC INPUTS High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Input Capacitance 1 LOGIC OUTPUTS DRVDD = 3.3 V High-Level Output Voltage (IOH = 50 μA) ...

Page 5

Parameter SPURIOUS-FREE DYNAMIC RANGE (SFDR 2.4 MHz INPUT f = 9.7 MHz INPUT f = 19.6 MHz INPUT f = 34.2 MHz INPUT MHz INPUT WORST HARMONIC (SECOND OR THIRD 2.4 MHz INPUT ...

Page 6

AD9237 TIMING DIAGRAM N–1 ANALOG INPUT CLK DATA N–11 OUT N+1 N N+2 N N+4 N+5 N–10 N–9 N–8 N–7 N–6 N–5 Figure 2. Timing Diagram Rev Page N+8 N+7 N+6 N–4 N–3 ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. With Pin Name Respect to Min ELECTRICAL AVDD AGND –0.3 DRVDD DGND –0.3 AGND DGND –0.3 AVDD DRVDD –3.9 Digital DGND –0.3 Outputs, OE CLK, MODE, AGND −0.3 MODE2 VIN+, VIN– AGND –0.3 VREF AGND ...

Page 8

AD9237 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin Number Mnemonic 1 MODE2 2 CLK PDWN DNC (LSB) to D11 (MSB) 15 DGND 16 ...

Page 9

TERMINOLOGY Analog Bandwidth (Full Power Bandwidth) The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay ( The delay between the 50% ...

Page 10

AD9237 EQUIVALENT CIRCUITS AVDD VIN+, VIN– Figure 4. Equivalent Analog Input Circuit MODE, 375Ω MODE2, GC, OE 70kΩ Figure 5. Equivalent MODE, MODE2, GC, OE Input Circuit DRVDD Figure 6. Equivalent Digital Output Circuit 375Ω CLK, PDWN Figure 7. Equivalent ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate with DCS disabled, T VREF = 1.0 V internal, FFT length 16 K, unless otherwise noted. 0 SNR = 66.9dBc SFDR = 87.0dBc –20 –40 –60 ...

Page 12

AD9237 0 SNR = 65.6dBc SFDR = 67.1dBc –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) Figure 14. AD9237-65 100 MHz FFT 90 SFDR dBFS 4V p-p 80 SFDR dBFS 2V p-p SNR dBFS 2V p-p ...

Page 13

SNR = 67.0dBFS SFDR = 87.8dBFS –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) Figure 20. AD9237-65 Two-Tone FFT MHz, f IN1 0 SNR = 67.2dBFS SFDR = 88.3dBFS –20 –40 ...

Page 14

AD9237 0 –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) Figure 26. AD9237-40 Two-Tone FFT MHz MHz IN1 IN2 90 85 SFDR SNR ...

Page 15

AD9237-20 AD9237-40 66.5 AD9237-65 66.0 65.5 65 CLOCK FREQUENCY (MSPS) Figure 32. AD9237 SINAD/ENOB vs. Clock Frequency with 10.83 80 10.75 75 10.67 70 10.59 65 10.50 60 –40 60 ...

Page 16

AD9237 APPLYING THE AD9237 THEORY OF OPERATION The AD9237 uses a calibrated, 11-stage pipeline architecture with a patented input SHA implemented. Each stage of the pipeline, excluding the last, consists of a low resolution flash ADC connected to a switched ...

Page 17

The output common mode of the reference buffer is set to mid- supply, and the REFT and REFB voltages and input span are defined as: REFT = ½(AVDD + VREF) REFB = ½(AVDD − VREF × − 4 ...

Page 18

AD9237 Table 7. Reference Configuration Summary Selected Mode SENSE Voltage External Reference AVDD Internal Fixed Reference VREF Programmable Reference 0 VREF Internal Fixed Reference AGND to 0.2 V VOLTAGE REFERENCE A stable and accurate 0.5 V voltage reference ...

Page 19

External Reference Operation The use of an external reference may be necessary to enhance the gain accuracy of the ADC or to improve thermal drift characteristics. Figure 41 shows the typical drift characteristics of the internal reference in both 1 ...

Page 20

AD9237 This maximum current occurs when every output bit switches on every clock cycle, that is, a full-scale square wave at the Nyquist frequency, f /2. In practice, the DRVDD current is CLK established by the average number of output ...

Page 21

By asserting the PDWN pin to AVDD/3, the AD9237 is placed in standby mode. In this state, the ADC typically dissipates 20 mW. The output drivers are placed in a high impedance state. The reference circuitry is enabled, allowing for ...

Page 22

... INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE 1, Model Temperature Range AD9237BCPZ-20 –40°C to +85°C AD9237BCPZRL7-20 –40°C to +85°C AD9237BCPZ-40 –40°C to +85°C AD9237BCPZRL7-40 –40°C to +85°C AD9237BCPZ-65 –40°C to +85°C AD9237BCPZRL7-65 –40°C to +85° RoHS-Compliant Part ...

Page 23

NOTES Rev Page AD9237 ...

Page 24

AD9237 NOTES © 2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05455–0–5/10(A) Rev Page ...

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