AD7719BR Analog Devices Inc, AD7719BR Datasheet - Page 31

• Manufacturer Part Number: AD7719BR
• Description: IC ADC 16BIT 24BIT DUAL 28-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7719BR

• Number Of Bits: 16/24
• Sampling Rate (per Second): 105
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 4.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• For Use With: EVAL-AD7719EB - BOARD EVAL FOR AD7719
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Analog Input Channels
The main ADC has four associated analog input pins (labeled
AIN1 to AIN4) that can be configured as two fully differential
input channels or three pseudodifferential input channels.
Channel selection bits CH1 and CH0 in the ADC0CON
register, along with the CHCON bit of the mode register,
detail the different configurations.
The auxiliary ADC has four external input pins (labeled AIN3
to AIN6) as well as an internal connection to the internal on-chip
temperature sensor. Channel selection bits ACH2, ACH1, and
ACH0 in the ADC1CON register, along with the CHCON
bit in the mode register, detail the various configurations on
these input channels.
Two input multiplexers (MUX1 and MUX2) switch the selected
input channel to the on-chip buffer amplifier in the case of the
main ADC when operated in buffered mode, and directly to the
Σ-∆ modulator input in the case of the auxiliary ADC and when
the main ADC is operated in unbuffered mode. When the analog
input channel is switched, the settling time of the part must elapse
before a new valid word is available from the ADC.
Figure 16 shows the analog input channel configurations available
to the user when the CHCON bit in the mode register is set to a
zero. In this case, the main ADC can be configured as one or two
fully differential input channels (AIN1/AIN2 and AIN3/AIN4)
and the aux can be configured as two single-ended inputs with
respect to AGND (AIN3/AGND and AIN4/AGND) and one fully
differential input AIN5/AIN6). The aux can also be configured as
three single-ended inputs with respect to AGND (AIN3/AGND,
AIN4/AGND, and AIN5/AGND) by tying AIN6 externally to
AGND. The temp sensor is available as an internal connection.
REV. A
Figure 16. Input Channel Configurations with CHCON = 0
FULLY DIFFERENTIAL
FULLY DIFFERENTIAL
FULLY DIFFERENTIAL
AIN3
AIN4
AIN6
AIN1
AIN2
AIN5
SINGLE-
ENDED
INPUT
SINGLE-
ENDED
INPUT
AIN2
AIN3
AIN3
AIN4
AIN1
AIN5
AIN6
AGND
AIN4
(MAIN ADC)
(AUX ADC)
MUX1
MUX2
MAIN CHANNEL
AUX CHANNEL
AIN(–)
AIN(+)
AIN(–)
AIN(+)
–31–
Figure 17 shows the analog input channel configurations avail-
able to the user when the CHCON bit in the mode register is
set to 1. In this case, the main ADC is configured as three
pseudodifferential input channels (AIN1/AIN4, AIN2/AIN4, and
AIN3/AIN4) and the aux can be configured as two single-ended
inputs with respect to AGND (AIN5/AGND and AIN6/AGND)
and one fully differential input (AIN5/AIN6). The temp sensor
is available as an internal connection.
In buffered mode (BUF = 0), the output of the main ADC multi-
plexer feeds into a high impedance input stage of the buffer
amplifier. As a result, the main ADC inputs can handle significant
source impedances and are tailored for direct connection to
external resistive-type sensors like strain gages or resistance
temperature detectors (RTDs).
The auxiliary ADC and the main ADC when operated with
BUF = 1, however, are unbuffered, resulting in higher analog
input current. It should be noted that these unbuffered input
paths provide a dynamic load to the driving source. Therefore,
resistor/capacitor combinations on the input pins can cause dc
gain errors, depending on the output impedance of the source
that is driving the ADC inputs. Table XVIII and XIX show the
allowable external resistance/capacitance values for unbuffered
mode such that no gain error at the 16- and 20-bit level,
respectively, is introduced.
The absolute input voltage range on the main ADC when oper-
ated in buffered mode is restricted to a range between AGND +
100 mV and AV
the common-mode voltage and input voltage range so that these
limits are not exceeded; otherwise there will be a degradation in
linearity and noise performance.
Figure 17. Input Channel Configurations with CHCON = 1
FULLY DIFFERENTIAL
AIN1
AIN2
AIN5
AIN3
AIN4
AIN6
AIN3/AIN4
DD
AIN2/AIN4
DIFFERENTIAL
– 100 mV. Care must be taken in setting up
SINGLE-
ENDED
INPUT
PSEUDO-
AIN1/AIN4
DIFFERENTIAL
INPUT
PSEUDO-
INPUT
SINGLE-
ENDED
INPUT
AIN2
AIN3
AIN3
AIN4
AIN1
AIN4
AIN5
AIN6
AGND
(MAIN ADC)
(AUX ADC)
MUX1
MUX2
AD7719
MAIN CHANNEL
AUX CHANNEL
AIN(+)
AIN(–)
AIN(–)
AIN(+)