LTC1292DCN8#PBF Linear Technology, LTC1292DCN8#PBF Datasheet - Page 20

• Manufacturer Part Number: LTC1292DCN8#PBF
• Description: IC DATA ACQ SYSTEM 12BIT 8-DIP
• Manufacturer: Linear Technology
• Type: Data Acquisition System (DAS)r

Specifications of LTC1292DCN8#PBF

• Resolution (bits): 12 b
• Sampling Rate (per Second): 60k
• Data Interface: Serial, Parallel
• Voltage Supply Source: Single Supply
• Voltage - Supply: 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Number Of Elements: 1
• Resolution: 12Bit
• Architecture: SAR
• Sample Rate: 60KSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 5V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 500mW
• Integral Nonlinearity Error: ±0.75LSB
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC1292/LTC1297
A
20
PPLICATI
Figure 20b. f
Figure 20a. f
Figure 21. LTC1292 ENOB vs Input Frequency
–140
–140
–100
–120
–100
–120
–40
–60
–80
–20
–40
–60
–80
12.0
11.5
11.0
10.5
10.0
–20
8.0
9.5
9.0
8.5
0
0
0
0
0
O
IN
IN
5
5
= 28kHz, f
= 1kHz, f
20
U
S
FREQUENCY (kHz)
FREQUENCY (kHz)
10
FREQUENCY (kHz)
10
40
I FOR ATIO
U
S
S
15
= 58.8kHz, SNR = 73.0dB
15
= 58.8kHz, SNR = 61.5dB
60
20
20
f
S
W
80
= 58.8kHz
LTC1292/7 F20b
LTC1292/7 F20a
25
LT1292/7 F21
25
100
30
30
U
Overvoltage Protection
Applying signals to the LTC1292/LTC1297’s analog
inputs that exceed the positive supply or that go below
ground will degrade the accuracy of the A/D and possi-
bly damage the devices. For example this condition
would occur if a signal is applied to the analog inputs
before power is applied to the LTC1292/LTC1297. An-
other example is the input source is operating from
different supplies of larger value than the LTC1292/
LTC1297. These conditions should be prevented either
with proper supply sequencing or by use of external
circuitry to clamp or current limit the input source.
There are two ways to protect the inputs. In Figure 23
diode clamps from the inputs to V
The second method is to put resistors in series with the
analog inputs for current limiting. Limit the current to
15mA per channel. The +IN input can accept a resistor
value of 1k but the –IN input cannot accept more than
250 when clocked at its maximum clock frequency of
1MHz. If the LTC1292/LTC1297 are clocked at the
maximum clock frequency and 250 is not enough to
current limit the input source, then the clamp diodes are
recommended (Figures 24a and 24b). The reason for
the limit on the resistor value is that the MSB bit test is
affected by the value of the resistor placed at the –IN
input (see discussion on Analog Inputs and the typical
performance characteristics Maximum CLK Frequency
vs Source Resistance).
Figure 22. f
–140
–100
–120
–20
–40
–60
–80
0
0
IN1
5
= 5.1kHz, f
10
FREQUENCY (kHz)
15
IN2
= 5.6kHz, f
20
CC
and GND are used.
25
LTC1292/7 F22
S
30
= 58.8kHz
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