UDA1345TS NXP Semiconductors, UDA1345TS Datasheet
UDA1345TS
Specifications of UDA1345TS
Available stocks
Related parts for UDA1345TS
UDA1345TS Summary of contents
Page 1
... DATA SHEET UDA1345TS Economy audio CODEC Product specification Supersedes data of 2000 Dec 19 INTEGRATED CIRCUITS 2002 May 28 ...
Page 2
... AC CHARACTERISTICS (DIGITAL) 13 APPLICATION INFORMATION 14 PACKAGE OUTLINE 15 SOLDERING 15.1 Introduction to soldering surface mount packages 15.2 Reflow soldering 15.3 Wave soldering 15.4 Manual soldering 15.5 Suitability of surface mount IC packages for wave and reflow soldering methods 16 DATA SHEET STATUS 17 DISCLAIMERS 2 Product specification UDA1345TS ...
Page 3
... Separate power control for ADC and DAC • Integrated digital interpolation filter plus non-inverting DAC • Functions controllable either by L3 microcontroller interface or via static pins • The UDA1345TS is pin and function compatible with the UDA1344TS • Small package size (SSOP28). 1.2 Multiple format input interface • ...
Page 4
... A-weighted − 44.1 kHz s − kHz s − code = 0; A-weighted f = 44.1 kHz kHz Product specification UDA1345TS TYP. MAX. UNIT 3.0 3.6 V 3.0 3.6 V 3.0 3 μA 600 800 μA 300 800 4 7.0 mA μA 50 150 2.0 3.0 mA μ ...
Page 5
... The input voltage to the ADC scales proportionally with the power supply voltage. 3. The output voltage of the DAC scales proportionally with the power supply voltage. 2002 May 28 CONDITIONS MIN. − − − − 5 Product specification UDA1345TS TYP. MAX. UNIT − − − − ...
Page 6
... ADC ADC DECIMATION FILTER DC-CANCELLATION FILTER DIGITAL INTERFACE INTERPOLATION FILTER NOISE SHAPER DAC DAC DDO V SSO V DDA(DAC) Fig.1 Block diagram ADCN V ref( dB/6 dB SWITCH L3-BUS INTERFACE MGS875 V SSA(DAC) V ref(D) Product specification UDA1345TS VINR MC1 MC2 MP5 MP2 MP3 MP4 SYSCLK VOUTR ...
Page 7
... SSO V 28 analog pad ref(D) 2002 May 28 TYPE 7 Product specification UDA1345TS DESCRIPTION ADC analog ground ADC analog supply voltage ADC input left ADC reference voltage ADC input right ADC negative reference voltage ADC positive reference voltage mode control 1 (pull-down) ...
Page 8
... Note: the sampling frequency range is from 8 to 100 kHz, however for the 512f clock mode the sampling range is s from kHz. 2002 May 28 7.1 The stereo ADC of the UDA1345TS consists of two V ref(D) 28 5th-order Sigma-Delta modulators. They have a modified Ritchie-coder architecture in a differential switched 27 V SSO capacitor implementation ...
Page 9
... Test modes Static pin mode . It shifts s Important: in L3MODE the UDA1345TS is completely pin and function compatible with the UDA1340M and the UDA1344TS. Note: the UDA1345TS does NOT support bass-boost and treble. 9 Product specification UDA1345TS The Filter Stream DAC (FSDAC) Power control L3MODE or static pin control ...
Page 10
... Attenuation Dynamic range / OUTPUT INTERFACE 7.11 The UDA1345TS is set to static pin control mode by setting both MC1 (pin 8) and MC2 (pin 21) HIGH. 7.11.1 The pinning definition under static pin control is given in Table 7. Table 7 Pinning definition for static pin control SYMBOL PIN MP1 ...
Page 11
... The formats are illustrated in Fig.3. Left and right data channel words are time multiplexed. 2002 May 28 7.11.5 and 384f . The UDA1345TS supports (RMS) input using series resistor as described in Section 7.2. In static pin mode the 3-level pin MP4 (pin 15) is used to select gain mode. When MP4 is set LOW the ADC is powered-down ...
Page 12
WS LEFT >= BCK DATA MSB B2 LSB WS LEFT >= BCK DATA MSB B2 LSB MSB WS LEFT 16 BCK DATA MSB WS LEFT BCK DATA MSB B2 ...
Page 13
... Data bits represent a 6-bit device address, with bit 7 being the MSB and bit 2 the LSB. The address of the UDA1345TS is 000101 (bit 7 to bit 2). In the event that the UDA1345TS receives a different address, it will deselect its microcontroller interface logic. 7.12.2 ...
Page 14
... L3DATA t halt handbook, full pagewidth L3MODE t s(MT) L3CLOCK L3DATA write 2002 May s(MA) t s(DAT) t h(DAT) BIT 0 Fig.4 Timing address mode h(DAT) BIT 0 Fig.5 Timing for data transfer mode. 14 Product specification UDA1345TS t s(MA) t h(MA BIT 7 t halt h(MT) t s(DAT) BIT 7 MGL884 MGL883 ...
Page 15
... IF0 DC FIRST IN TIME BIT 3 BIT 2 BIT 1 BIT 0 VC3 VC2 VC1 VC0 DE0 PC1 PC0 15 Product specification UDA1345TS address MGD018 REGISTER SELECTED System Clock frequency (5 : 4); data Input Format (3 : 1); DC-filter REGISTER SELECTED Volume Control ( not used De-Emphasis (4 : 3); MuTe Power Control ( ...
Page 16
... VC5 VC4 VC3 VC2 VC1 VC0 FUNCTION 0 512f s : 384f s 1 256f s 1 not used FUNCTION 7.12.2.6 A 2-bit value to enable the digital de-emphasis filter. Table 19 De-emphasis settings DE1 7.12.2.7 A 1-bit value to enable the digital DAC mute (playback). Table 20 DAC mute FUNCTION 16 Product specification UDA1345TS ...
Page 17
... JEDEC II specification = 125 °C; T amb ° amb DD note 2 output short-circuited to V SSA(DAC) output short-circuited to V DDA(DAC) CONDITIONS in free air 17 Product specification UDA1345TS FUNCTION ADC off off on on MIN. MAX. − 5.0 − 150 −65 +125 −40 +85 − 200 = 3 V; − 450 − ...
Page 18
... ADC power-down all operating mode DAC power-down operating mode DAC power-down operating mode ADC and DAC power-down = − with respect kHz i 18 Product specification UDA1345TS MIN. TYP. MAX. 2.4 3.0 3.6 2.4 3.0 3.6 2.4 3.0 3.6 − − 600 800 − ...
Page 19
... When higher capacitive loads must be driven then a 100 Ω resistor must be connected in series with the DAC output in order to prevent oscillations in the output operational amplifier. 2002 May 28 CONDITIONS with respect to V (THD + N)/S < 0.1%; = 800 Ω note 2 ) must be connected to the same external power supply unit Product specification UDA1345TS MIN. TYP. MAX. − − 20 0.45V 0.5V 0.55V SSA DDA DD A − ...
Page 20
... A-weighted f = 44.1 kHz kHz s code = 0; A-weighted f = 44.1 kHz kHz kHz; ripple ripple(p-p) 20 Product specification UDA1345TS MIN. TYP. MAX. UNIT −2.5 −1.5 −0.5 dBFS − − 0.1 dB − −85 −80 dB − −80 −75 dB − −36 −30 dB − −34 − ...
Page 21
... MHz sys ≥ 19.2 MHz f sys f < 19.2 MHz sys ≥ 19.2 MHz f sys address mode address mode data transfer mode data transfer mode 21 Product specification UDA1345TS MIN. TYP. MAX 488 325 244 ns − 0.30T 0.70T ns sys sys − ...
Page 22
... CWL T sys Fig.7 System clock timing. t s(WS) t h(WS BCKL t d(DATAO-WS) Fig.8 Serial interface timing. 22 Product specification UDA1345TS MIN. TYP. MAX. − − 190 − − 30 − − 190 MGR984 t d(DATAO-BCK) t h(DATAO) t s(DATAI) ...
Page 23
... VOUTR 24 47 μF ( ref(D) 28 C23 100 nF ( SSA(DAC) V DDA(DAC) C27 100 nF (63 V) C10 100 μF R29 ( Ω V DDA Product specification UDA1345TS C3 47 μF ( R23 left output 100 Ω R22 10 kΩ X3 R26 right output 100 Ω R27 10 kΩ μF (16 V) MGS877 ...
Page 24
... 0.38 0.20 10.4 5.4 7.9 0.65 0.25 0.09 10.0 5.2 7.6 REFERENCES JEDEC JEITA MO-150 detail 1.03 0.9 1.25 0.2 0.13 0.63 0.7 EUROPEAN PROJECTION Product specification UDA1345TS SOT341 θ (1) θ 1.1 8 0.1 o 0.7 0 ISSUE DATE 99-12-27 03-02-19 ...
Page 25
... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 °C. 25 Product specification UDA1345TS ...
Page 26
... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 May 28 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 26 Product specification UDA1345TS (1) REFLOW suitable suitable suitable suitable suitable ...
Page 27
... NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. 27 Product specification UDA1345TS DEFINITION ...
Page 28
... NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 28 Product specification UDA1345TS ...
Page 29
... Interface, Security and Digital Processing expertise Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. ...