MT18HTF25672PY-667G1 Micron Technology Inc, MT18HTF25672PY-667G1 Datasheet - Page 13
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MT18HTF25672PY-667G1
Manufacturer Part Number
MT18HTF25672PY-667G1
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT18HTF25672PY-667G1.pdf
(18 pages)
Specifications of MT18HTF25672PY-667G1
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
1Gb
Access Time (max)
45ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
2.43A
Number Of Elements
18
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / Rohs Status
Compliant
Table 15:
Table 16:
PDF: 09005aef80e5e752/Source: 09005aef80e5e626
HTF18C64_128_256x72.fm - Rev. E 3/07 EN
Parameter
Parameter
DC high-level input voltage
DC low-level input voltage
Input voltage (limits)
DC high-level input voltage
DC low-level input voltage
Input differential-pair cross
voltage
Input differential voltage
Input differential voltage
Input current
Output disabled current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
PLL Specifications
CU877 device or equivalent JESD82-8.01
PLL Clock Driver Timing Requirements and Switching Characteristics
Notes:
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
Symbol
V
V
This is a subset of parameters for the specific PLL used. Detailed PLL information is available
in JEDEC standard JESD82.
I
ID
ID
I
DDLD
V
V
V
V
I
C
V
V
ODL
DD
I
(
(
IH
IN
IH
IX
IN
IL
IL
I
DC
AC
512MB, 1GB, 2GB (x72, ECC, SR) 240-Pin DDR2 SDRAM RDIMM
)
)
RESET#, CK, CK#
Each input
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
RESET#
RESET#
RESET#
Pins
n/a
RESET# = V
13
(not connected to PCB)
CK, CK# = 270 MHz, all
V
V
V
Differential input
Differential input
Differential input
Differential input
Differential input
CK = CK# = LOW
I
I
I
outputs open
= V
= V
= V
Condition
LVCMOS
LVCMOS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SS
Symbol
DD
DD
V
DD
Q; V
IL
t
Q or V
Q or V
Q or V
(
LS
t
DC
L
I
I
)
= V
Register and PLL Specifications
SS
SS
SS
IH
Q
Q
Q
(
AC
) or
Min
1.0
0.0
2.0
30
–
0.65 × V
0.65 × V
(V
DD
–250
Min
–0.3
0.15
–10
100
0.3
0.6
©2003 Micron Technology, Inc. All rights reserved.
–
–
–
–
2
Q/2) -
DD
DD
–0.50
Max
V
V
V
0.35 × V
0.35 × V
(V
15
33
4
DD
DD
DD
–
DD
Max
0.15
250
500
300
Q + 0.3
Q + 0.4
Q + 0.4
10
Q/2) +
3
–
–
–
DD
DD
Units
MHz
V/ns
Units
kHz
µs
%
mV
mA
µA
µA
µA
µA
pF
V
V
V
V
V
V
V