SC2200UFH-266B D3 AMD (ADVANCED MICRO DEVICES), SC2200UFH-266B D3 Datasheet - Page 302
SC2200UFH-266B D3
Manufacturer Part Number
SC2200UFH-266B D3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.SC2200UFH-266B_D3.pdf
(429 pages)
Specifications of SC2200UFH-266B D3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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I/O Port 020h / 0A0h
I/O Port 020h / 0A0h
I/O Port 020h / 0A0h
The function of this register is set with bits [1:0] in a write to 020h.
Interrupt Request Register
Bit
7:5
4:3
2:0
6:5
1:0
2
1
0
7
4
3
2
7
6
5
4
Description
IRQ2 / IRQ10 Mask.
0: Not Masked.
1: Mask.
IRQ1 / IRQ9 Mask.
0: Not Masked.
1: Mask.
IRQ0 / IRQ8 Mask.
0: Not Masked.
1: Mask.
Rotate/EOI Codes.
000: Clear rotate in Auto EOI mode
001: Non-specific EOI
010: No operation
011: Specific EOI (bits [2:0] must be valid)
Reserved. Must be set to 0.
IRQ Number (000-111).
Reserved. Must be set to 0.
Special Mask Mode.
00: No operation.
01: No operation.
10: Reset Special Mask Mode.
11: Set Special Mask Mode.
Reserved. Must be set to 0.
Reserved. Must be set to 1.
Poll Command.
0: Disable.
1: Enable.
Register Read Mode.
00: No operation.
01: No operation.
10: Read interrupt request register on next read of Port 20h.
11: Read interrupt service register on next read of Port 20h.
IRQ7 / IRQ15 Pending.
0: Yes.
1: No.
IRQ6 / IRQ14 Pending.
0: Yes.
1: No.
IRQ5 / IRQ13 Pending.
0: Yes.
1: No.
IRQ4 / IRQ12 Pending.
0: Yes.
1: No.
Table 6-46. Programmable Interrupt Controller Registers (Continued)
32580B
Master / Slave PIC Interrupt Request and Service Registers
Master / Slave PIC OCW2 (WO)
Master / Slave PIC OCW3 (WO)
for OCW3 Commands (RO)
100: Set rotate in Auto EOI mode
101: Rotate on non-specific EOI command
110: Set priority command (bits [2:0] must be valid)
111: Rotate on specific EOI command
Core Logic Module - ISA Legacy Register Space
AMD Geode™ SC2200 Processor Data Book
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