GCIXP1240AB 837151 Intel, GCIXP1240AB 837151 Datasheet - Page 61
GCIXP1240AB 837151
Manufacturer Part Number
GCIXP1240AB 837151
Description
Manufacturer
Intel
Datasheet
1.GCIXP1240AB_837151.pdf
(146 pages)
Specifications of GCIXP1240AB 837151
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Table 28. 32-bit Unidirectional IX Bus, 3+ MAC Mode
GPIO[3:1]
PORTCTL_L[3:2]
GPIO[0]
SOP32
EOP32
TXASIS
FBE_L[7:4]
FDAT[63:31]
Receive Path Signals
FPS[2:0]
PORTCTL_L[1:0]
RDYCTL_L[4]
SOP
EOP
RXFAIL
FBE_L[3:0]
FDAT[31:0]
Control Signals Common to both Transmit/Receive Paths
RDYCTL_L[3:0]
RDYBUS[7:0]
TK_IN
TK_OUT
FAST_RX1
FAST_RX2
Transmit Path Signals
Active high outputs, Transmit Port Selects [2:0].
Active Low, outputs.
Used with GPIO[0]/FC_EN0_L/TXPEN for transmit device select via external
2-to-4 decoder.
Active High, output, transmit enable.
Used with PORTCTL_L[3:2] for transmit device select via external 2-to-4
decoder.
Active High, output, transmit Start of Packet. SOP32 is output during transmit
according to values programmed in the TFIFO control field.
Active High, output, transmit End of Packet. EOP32 is output during transmit
according to values programmed in the TFIFO control field.
Active High, output. TXASIS states are output according to values programmed
in the TFIFO Control field. TXASIS state is output coincident with SOP32 signal.
Active Low, output, byte enables for FDAT [63:31].
Active High, output, 32-bit transmit data.
Active High, output. Receive Port Selects [2:0].
Active Low, output. Used with RDYCTL_L[4] for receive device select via
external 2-to-4 decoder.
Active Low, output, receive enable. Used to enable an external 2-to-4 decoder.
Used with PORTCTL_L[1:0].
Active High, input/output, input receive Start of Packet from the MAC. Driven as
output when bus remains in No-Select state.
Active High, input/output, input receive End of Packet from the MAC. Driven as
output when bus remains in No-Select state.
Active Low, input/output, input Receive Error indication from the MAC. Driven as
output when bus remains in No-Select state.
Active High, input/output, input byte enables for FDAT [31:0] from the MAC.
Driven as output when bus remains in No-Select state.
Active High, input/output, input 32-bit receive data from the MAC. Driven as
output when bus remains in No-Select state.
Output, 4 bits encoded for Transmit/Receive Ready flags, flow-control, and
inter-chip communication. Decode with external 4-to-16 decoder.
Active High, input/output, Transmit or Receive Ready flags, and flow control
mask data.
Input, not used, must be pulled High in this mode.
Output, not used, no connect.
Active High, ready input from Fast Port 0, pulldown 10 KOhms if not used.
Active High, ready input from Fast Port 1, pulldown 10 KOhms if not used.
Description
Intel
®
IXP1240 Network Processor
61
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