GWIXP460BADT Intel, GWIXP460BADT Datasheet - Page 55
GWIXP460BADT
Manufacturer Part Number
GWIXP460BADT
Description
Manufacturer
Intel
Datasheet
1.GWIXP460BADT.pdf
(163 pages)
Specifications of GWIXP460BADT
Core Operating Frequency
533MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Package Information
Table 13.
May 2005
55
HSS_TXFRAME0
HSS_TXDATA0
HSS_TXCLK0
HSS_RXFRAME0
NOTE: This table discusses all features supported on the Intel
† For a legend of the Type codes, see
Name
processor, see
High-Speed, Serial Interface 0 (Sheet 1 of 2)
Reset
Table 1 on page
Power
on
Z
Z
Z
Z
†
Reset
Z
Z
Z
Z
Table 10 on page
14.
†
Software
Enables
Normal
Reset
After
Until
VOD
VB
VB
VB
Software
Enables
46.
Normal
After
VOD
VB
VB
VB
®
IXP45X and Intel
Type
OD
I/O
I/O
I/O
†
The High-Speed Serial (HSS) transmit frame signal can be configured as an input or an output to
allow an external source become synchronized with the transmitted data. Often known as a Frame
Sync signal. Configured as an input upon reset.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the HSS soft
fuse (refer to Expansion Bus Controller chapter of the Intel
Line of Network Processors Developer’s Manual) and is not being used in a system design, this
interface/signal is not required for any connection.
Transmit data out. Open Drain output.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor to V
HSS soft fuse (refer to Expansion Bus Controller chapter of the Intel
Product Line of Network Processors Developer’s Manual) and is not being used in a system
design, this interface/signal is not required for any connection.
The High-Speed Serial (HSS) transmit clock signal can be configured as an input or an output. The
clock can be a frequency ranging from 512 KHz to 8.192 MHz. Used to clock out the transmitted data.
Configured as an input upon reset. Frame sync and data can be selected to be generated on the rising
or falling edge of the transmit clock.
The High-Speed Serial (HSS) receive frame signal can be configured as an input or an output to
allow an external source to become synchronized with the received data. Often known as a Frame
Sync signal. Configured as an input upon reset.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the HSS soft
fuse (refer to Expansion Bus Controller chapter of the Intel
Line of Network Processors Developer’s Manual) and is not being used in a system design, this
interface/signal is not required for any connection.
®
IXP46X Product Line of Network Processors. For details on feature support listed by
Intel
®
IXP45X and Intel
®
Description
IXP46X Product Line of Network Processors Datasheet
CCP
. When this interface is disabled via the
®
®
IXP45X and Intel
IXP45X and Intel
Document Number:
®
IXP45X and Intel
®
®
IXP46X Product
IXP46X Product
306261-002
®
IXP46X
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