82V1068PF8 IDT, Integrated Device Technology Inc, 82V1068PF8 Datasheet - Page 42
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82V1068PF8
Manufacturer Part Number
82V1068PF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1068PF8.pdf
(56 pages)
Specifications of 82V1068PF8
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.6V
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
IDT82V1068 OCTAL PROGRAMMABLE PCM CODEC
LC7:
LC8:
LC9:
LC10:
Transmit Timeslot and Transmit Highway Selection, Read/Write (08H/88H) (For MPI mode only)
The Transmit Timeslot selection bits (TT[6:0]) determine which time slot will be used to transmit the data of the corresponding channel.
The valid value of TT[6:0] is 0d - 127d, corresponding to TS0 to TS127. The default value is N for Channel N+1 (N = 0 to 7).
The Transmit Highway Selection bit (THS) selects a PCM highway for the corresponding channel to transmit the voice data.
THS = 0:
THS = 1:
Receive Timeslot and Highway Selection, Read/Write (09H/89H) (For MPI mode only)
The Receive Timeslot selection bits RT[6:0] determine which time slot will be used for the corresponding channel to receive the data. The
valid value of RT[6:0] is 0d - 127d, corresponding to TS0 to TS127. The default value is N for Channel N+1 (N = 0 to 7).
The Receive Highway Selection bit RHS selects a PCM highway for the corresponding channel to receive the voice data.
RHS = 0:
RHS = 1:
SLIC I/O Data, Read/Write (0AH/8AH) (For MPI mode only)
The SLIC I/O Data register contains the information of the SLIC I/O pins SI1, SI2, SB1, SB2, SO1, SO2 and SO3 on the corresponding
channel. The default value of this register is 0d. It should be noted that the SI1, SI2, SB1 and SB2 bits in this register are read only.
D/A Gain and A/D Gain Setting, Channel Power Down, Read/Write (0CH/8CH)
The GDA bit is used to set the analog gain of D/A for the corresponding channel.
GDA = 0:
GDA = 1:
The GAD bit is used to set the analog gain of A/D for the corresponding channel.
GAD = 0:
GAD = 1:
The Channel Power Down bit (PD) disables or enables the corresponding channel.
PD = 0:
PD = 1:
Command
Command
Command
Command
I/O Data
I/O Data
I/O Data
I/O Data
Reserved
DX1 is selected (default);
DX2 is selected.
DR1 is selected (default);
DR2 is selected.
0 dB (default);
-6 dB.
0 dB (default);
+6 dB.
The corresponding channel is in normal operation;
The corresponding channel is powered down (default).
RHS
R/W
THS
R/W
R/W
R/W
PD
b7
b7
b7
b7
RT[6]
TT[6]
GAD
SO3
b6
b6
b6
b6
0
0
0
0
TT[5]
RT[5]
GDA
SO2
b5
b5
b5
b5
0
0
0
0
TT[4]
RT[4]
SO1
42
b4
b4
b4
b4
0
0
0
0
TT[3]
RT[3]
SI1
b3
b3
b3
b3
1
1
1
1
Reserved
RT[2]
TT[2]
SI2
b2
b2
b2
b2
0
0
0
1
INDUSTRIAL TEMPERATURE RANGE
RT[1]
TT[1]
SB1
b1
b1
b1
b1
0
0
1
0
TT[0]
RT[0]
SB2
b0
b0
b0
b0
0
1
0
0