PPC5561MVZ132 Freescale Semiconductor, PPC5561MVZ132 Datasheet - Page 52

• Manufacturer Part Number: PPC5561MVZ132
• Manufacturer: Freescale Semiconductor

Specifications of PPC5561MVZ132

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Revision History for the MPC5561 Data Sheet
52
Table 13
Table 14
Table 15
Table 16
Table 17
Table 19
Table 20
Table 21
Location
eQADC Conversion Specifications: Added (T
Flash Program and Erase Specifications:
Flash EEPROM Module Life:
FLASH BIU Settings vs. Frequency of Operations:
Pad AC Specifications and
Reset and Configuration Pin Timing: Footnote 1, deleted ‘f
JTAG Pin AC Electrical Characteristics:
Nexus Debug Port Timing.
• Added (T
• Specs 7, 8, 9, and 10:
• Moved footnote 1 from the table title to directly after the ‘Typical’ in the column 5 header.
• Footnote 2: Changed from: ‘Initial factory condition: ≤ 100 program/erase cycles, 25
• Replaced (Full Temperature Range) with (T
• Spec 1b, Min. column value changed from 10,000 to 1,000.
• Changed the Maximum Operating Frequency column entry from: Up to and including132 MHz to: Up to and
• Added footnote 1 to the end of the table title, The footnote reads: ‘Illegal combinations exist. Use entries from the
• Moved footnote 2:’ For maximum flash performance, set to 0b11’ to the ‘DPFEN’ column header.
• Deleted the x-refs in the ‘DPFEN’ column for the rows.
• Created a x-ref for footnote 2 and inserted in the ‘IPFEN’ column header.
• Deleted the x-refs in the ‘IPFEN’ column for the rows.
• Moved footnote 3:’ For maximum flash performance, set to 0b110’ to the ‘PFLIM’ column header.
• Deleted the x-refs in the ‘PFLIM’ column for the rows.
• Moved footnote 4:’ For maximum flash performance, set to 0b1’ to the ‘BFEN’ column header.
• Deleted the x-refs in the ‘BFEN’ column for the rows.
• Changed footnote 6 from: ‘Allows for 128 MHz system clock with 2% frequency modulation’ to: ‘Allows for 132
• Footnote 1, deleted ‘f
• Footnote 2, changed from ‘tested’ to ‘(not tested).’
• Footnote 3, changed from ‘Out delay. . .’ to ‘The output delay. . .’,
• Changed from ‘Add a maximum of one system clock to the output delay to get the output delay with respect to
• Footnote 4: changed ‘Delay’ to ‘The output delay.’
• Footnote 5: deleted ‘before qualification.’
• Changed from ‘This parameter is supplied for reference and is not guaranteed by design and not tested’ to ‘This
• Footnote 1, deleted: ‘f
• Footnote 1, changed ‘functional’ to ‘Nexus.’
• Changed Spec 12, TCK Low to TDO Data Valid: Changed ‘VDDE = 3.0 to 3.6 volts’ maximum value in column 4
• Footnote 5, changed from ‘to MCKO. The timing is . . .’ to: ‘ to ‘MCKO and is . . .’
80 MHz minimum system frequency.‘ to: ‘Initial factory condition: ≤ 100 program/erase cycles, 25
typical supply voltage measured at a minimum system frequency of 80 MHz.’
including134 MHz.
same row in this table.’
MHz system clock with 2% frequency modulation.’
the system clock‘ to ‘To calculate the output delay with respect to the system clock, add a maximum of one system
clock to the output delay.’
parameter is supplied for reference and is guaranteed by design and tested.’
from 9 to 10. Now reads ‘VDDE = 3.0–3.6 V’ with a max value of 10.
Changed typical values — 48 KB: from 340 to 345; 64 KB: from 400 to 415
Spec 8, 128KB block pre-program and erase time, Max. column value from 15,000 to 7,500.
Table 28. Table and Figure Changes Between Rev. 0.0 and 1.0 (continued)
A
= T
L
– T
H
) to the table title.
SYS
Table 18
SYS
MPC5561 Microcontroller Data Sheet, Rev. 2.0
= 132 MHz.’
= 132 MHz.’ and ‘, and CL = 30 pF with DSC = 0b10, SRC = 0b11’
Derated Pad AC Specifications:
A
= T
Description of Changes
A
L
= T
– T
L
H
– T
) to the table title.
SYS
H
) in the table title.
= 132 MHz.’
o
C, typical supply voltage,
Freescale Semiconductor
o
C, using a