EVAL-ADV7314EB Analog Devices Inc, EVAL-ADV7314EB Datasheet - Page 16

• Manufacturer Part Number: EVAL-ADV7314EB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADV7314EB

• Lead Free Status / Rohs Status: Not Compliant

ADV7314
Pin No.
50
49
2–9, 12–13
14–18, 26–30 C9–C0
51–55, 58–62 S9–S0
33
35, 47
22
21
20
1
10, 56
41
46
34
31
19
64
TERMINOLOGY
SD
HD
PS
HDTV
YCrCb
YPrPb
Standard definition video, conforming to ITU-R BT.601/656.
High definition video, such as progressive scan or HDTV.
Progressive scan video, conforming to SMPTE 293M, ITU-R BT.1358, BTA T-1004 EDTV2, BTA 1362
High definition television video, conforming to SMPTE 274M or SMPTE 296M.
SD, HD, or PS component digital video.
HD, SD, or PS component analog video.
Mnemonic
S_HSYNC
S_VSYNC
Y9–Y0
RESET
R
SCLK
SDA
ALSB
V
V
V
V
EXT_LF
RTC_SCR_TR
I
GND_IO
2
DD_IO
DD
AA
REF
C
SET2
, R
SET1
Input/Output
I/O
I/O
I
I
I
I
I
I
I/O
I
P
P
P
I/O
I
I
I
Multifunctional Input. Real-time control (RTC) input, timing reset input,
Function
Video Horizontal Sync Control Signal for SD Only.
Video Vertical Sync Control Signal for SD Only.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for inter-
leaved progressive scan data. The LSB is set up on Pin Y0. For 8-bit data
input, LSB is set up on Y2.
Progressive Scan/HDTV Input Port. In 4:4:4 Input mode, this port is used for
the Cb[Blue/U] data. The LSB is set up on Pin C0. For 8-bit data input, LSB
is set up on C2.
SD or Progressive Scan/HDTV Input Port for Cr [Red/V] Data in 4:4:4 Input
Mode. LSB is set up on Pin S0. For 8-bit data input, LSB is set up on S2.
This input resets the on-chip timing generator and sets the ADV7314 into
default register setting. RESET is an active low signal.
A 3040 W resistor must be connected from this pin to AGND and is used
to control the amplitudes of the DAC outputs.
I
I
TTL Address Input. This signal sets up the LSB of the I
this pin is tied low, the I
interface.
Power Supply for Digital Inputs and Outputs.
Digital Power Supply.
Analog Power Supply.
Optional External Voltage Reference Input for DACs or Voltage Reference
Output (1.235 V).
External Loop Filter for the Internal PLL.
subcarrier reset input.
This input pin must be tied high (V
over the I
Digital Input/Output Ground.
2
2
C Port Serial Interface Clock Input.
C Port Serial Data Input/Output.
–16–
2
C port.
2
C filter is activated, reducing noise on the I
DD_IO
) for the ADV7314 to interface
2
C address. When
2
C
REV. 0