EVAL-ADV7314EB Analog Devices Inc, EVAL-ADV7314EB Datasheet - Page 4

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EVAL-ADV7314EB

Manufacturer Part Number
EVAL-ADV7314EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADV7314EB

Lead Free Status / Rohs Status
Not Compliant
ADV7314–SPECIFICATIONS
Parameter
STATIC PERFORMANCE
DIGITAL OUTPUTS
DIGITAL AND CONTROL INPUTS
ANALOG OUTPUTS
VOLTAGE REFERENCE
POWER REQUIREMENTS
NOTES
1
2
3
4
5
6
7
8
Specifications subject to change without notice.
Oversampling disabled. Static DAC performance will be improved with increased oversampling ratios.
DNL measures the deviation of the actual DAC output voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for –ve DNL,
Value in brackets for V
External current required to overdrive internal V
I
Guaranteed maximum by characterization.
I
All DACs on.
the actual step value lies below the ideal step value.
DD
AA
DAC-to-DAC Matching
Resolution
Integral Nonlinearity
Differential Nonlinearity
Differential Nonlinearity
Output Low Voltage, V
Output High Voltage, V
Three-State Leakage Current
Three-State Output Capacitance
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current
Input Capacitance, C
Full-Scale Output Current
Output Current Range
Output Compliance Range, V
Output Capacitance, C
Internal Reference Range, V
External Reference Range, V
V
Normal Power Mode
Sleep Mode
Power Supply Rejection Ratio
, the circuit current, is the continuous current required to drive the digital core.
is the total current required to supply all DACs including the V
REF
I
I
I
I
I
I
DD
DD_IO
AA
DD
AA
DD_IO
7, 8
Current
5
4
DD_IO
= 2.375 V–2.75 V.
IN
IL
IH
OUT
OL
OH
2
2
, –ve
, +ve
1
REF
REF
OC
REF
.
REF
(V
V
(0 C to 70 C), unless otherwise noted.)
Min
2.4 [2.0]
2
4.1
4.1
0
1.15
1.15
REF
AA
circuitry and the PLL circuitry.
= 2.375 V–2.625 V, V
= 1.235 V, R
3
–4–
Typ
14
2.0
1.0
3.0
3
2
4.33
4.33
1.0
1.0
1.235
1.235
± 10
170
110
95
172
1.0
39
200
10
250
0.01
7
± 1.0
2
SET
= 3040
Max
0.4 [0.4]
0.8
4.6
4.6
1.4
1.3
1.3
190
45
DD
= 2.375 V–2.625 V; V
6
, R
LOAD
3
= 150
Unit
Bits
LSB
LSB
LSB
V
V
mA
pF
V
V
mA
pF
mA
mA
%
V
pF
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
%/%
. All specifications T
Test Conditions
I
I
V
V
SD Only [16 ]
PS Only [8 ]
HDTV Only [2 ]
SD [16 , 10 Bit] + PS [8 , 20 Bit]
SINK
SOURCE
IN
IN
DD_IO
= 0.4 V, 2.4 V
= 2.4 V
= 3.2 mA
= 2.375 V–3.6 V,
= 400 mA
MIN
to T
MAX
REV. 0