SC16C2550BIBS NXP Semiconductors, SC16C2550BIBS Datasheet - Page 10
SC16C2550BIBS
Manufacturer Part Number
SC16C2550BIBS
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C2550BIBS.pdf
(43 pages)
Specifications of SC16C2550BIBS
Number Of Channels
2
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
32
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C2550BIBS,151
Manufacturer:
NXP
Quantity:
1 861
NXP Semiconductors
SC16C2550B_5
Product data sheet
6.2 Internal registers
Table 4.
The SC16C2550B provides two sets of internal registers (A and B) consisting of
12 registers each for monitoring and controlling the functions of each channel of the
UART. These registers are shown in
registers (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO Control
Register (FCR), line status and control registers (LCR/LSR), modem status and control
registers (MCR/MSR), programmable data rate (clock) control registers (DLL/DLM) and a
user-accessible Scratchpad Register (SPR).
Table 5.
[1]
[2]
Chip Select
CSA, CSB = 1
CSA = 0
CSB = 0
A2
General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LCR/LSR, SPR)
0
0
0
0
1
1
1
1
Baud rate register set (DLL/DLM)
0
0
These registers are accessible only when LCR[7] is a logic 0.
These registers are accessible only when LCR[7] is a logic 1.
A1
0
0
1
1
0
0
1
1
0
0
Serial port selection
Internal registers decoding
A0
0
1
0
1
0
1
0
1
0
1
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 05 — 12 January 2009
READ mode
Receive Holding Register
Interrupt Enable Register
Interrupt Status Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
Function
none
UART channel A
UART channel B
[2]
Table
5. The UART registers function as data holding
WRITE mode
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
n/a
n/a
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
SC16C2550B
[1]
© NXP B.V. 2009. All rights reserved.
10 of 43