SCC2691AC1A28-T NXP Semiconductors, SCC2691AC1A28-T Datasheet - Page 11

• Manufacturer Part Number: SCC2691AC1A28-T
• Description: UART 1-CH 5V 28-Pin PLCC T/R
• Manufacturer: NXP Semiconductors

Specifications of SCC2691AC1A28-T

• Package: 28PLCC
• Number Of Channels Per Chip: 1
• Maximum Data Rate: 0.1152 MBd
• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage: 5 V
• Minimum Single Supply Voltage: 4.5 V
• Maximum Processing Temperature: 245 °C
• Maximum Supply Current: 2 mA

Philips Semiconductors
Table 2.
2006 Aug 04
MR1 (Mode Register 1)
NOTE:
*In block error mode, block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
MR2 (Mode Register 2)
NOTE: *Add 0.5 to values shown for 0–7 if channel is programmed for 5 bits/character.
CSR (Clock Select Register)
See Table 6 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692, SCC68681
and SCC2698B” Philips Semiconductors ICs for Data Communications, IC-19, 1994.
CR (Command Register)
NOTE:
Access to the miscellaneous commands should be separated by 3 X1 clock edges. A disabled transmitter cannot be loaded.
SR (Channel Status Register)
NOTE:
*These status bits are appended to the corresponding data character in the receive FIFO. A read of the status register provides these bits [7:5]
command (command 4x) or a receiver reset.
ACR (Auxiliary Control Register)
ISR (Interrupt Status Register)
IMR (Interrupt Mask Resister)
Received Break
from the top of the FIFO together with bits [4;0]. These bits are cleared by a reset error status command. In character mode they are reset when
RxRTS Control
the corresponding data character is read from the FIFO. In block error mode, block error conditions must be cleared by using the error reset
Universal asynchronous receiver/transmitter (UART)
MPI Change
Interrupt
BRG Set
0 = Set 1
1 = Set 2
MPI Pin
Change
1 = Yes
1 = Yes
Bit 7
1 = yes
0 = No
0 = No
0 = Off
1 = On
0 = no
Select
11 = Remote loop
01 = Auto echo
10 = Local loop
00 = Normal
*
Channel Mode
Register Bit Formats
Current State
RxINT Select
Miscellaneous Commands
0 = RxRDY
1 = FFULL
MPI Level
Interrupt
Framing
1 = High
MPI Pin
0 = Low
1 = Yes
Receiver Clock Select
0 = Off
1 = On
0 = No
Bit 6
Error
*
See Text
See Text
Mode and Source
Counter/Timer
Error Mode*
Not used
Not used
1 = Block
Control
0 = Char
See Text
TxRTS
1 = Yes
1 = Yes
0 = No
0 = No
Parity
Bit 5
Error
*
CTS Enable
Ready Int
Overrun
Counter
Counter
1 = Yes
1 = Yes
1 = Yes
0 = No
Ready
0 = Off
1 = On
0 = No
0 = No
Bit 4
Error
11 = Special mode
00 = With parity
01 = Force parity
10 = No parity
Tx
Parity Mode
11
PWRDN Active
Power-Down
Delta Break
Disable Tx
Interrupt
1 = Yes
TxEMT
1 = Yes
Normal
1 = Yes
0 = No
0 = No
0 = On
1 = Off
0 = No
0 = Off
1 = On
Break
Mode
Bit 3
Delta
0 = 0.563
1 = 0.625
2 = 0.688
3 = 0.750
RxRDY/FFULL
Parity Type
011 = TxC (16X)
Enable Tx
000 = RTSN
001 = C/TO
010 = TxC (1X)
Transmitter Clock Select
4 = 0.813
5 = 0.875
6 = 0.938
7 = 1.000
Interrupt
0 = Even
RxRDY/
1 = Odd
1 = Yes
1 = Yes
1 = Yes
TxRDY
FFULL
0 = No
0 = No
0 = No
0 = Off
1 = On
Bit 2
Stop Bit Length*
See Text
A = 1.688
B = 1.750
Function Select
8 =1.563
9 = 1.625
Disable Rx
MPO Pin
Interrupt
1 = Yes
1 = Yes
1 = Yes
FFULL
TxEMT
TxEMT
0 = Off
1 = On
0 = No
0 = No
0 = No
Bit 1
Bits per Character
111 = RxRDY/FFULL
101 = RxC (16X)
110 = TxRDY
100 = RxC (1X)
00 = 5
01 = 6
10 = 7
11 = 8
C = 1.813
D = 1.875
E = 1.938
F = 2.000
SCC2691
Product data sheet
Enable Rx
Interrupt
1 = Yes
RxRDY
1 = Yes
1 = Yes
TxRDY
TxRDY
0 = No
0 = No
0 = No
0 = Off
1 = On
Bit 0