ATF1502ASL-25JU44 Atmel, ATF1502ASL-25JU44 Datasheet - Page 16

• Manufacturer Part Number: ATF1502ASL-25JU44
• Description: IC CPLD EE LP 25NS 44-PLCC
• Manufacturer: Atmel
• Series: ATF1502AS(L)r

Specifications of ATF1502ASL-25JU44

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 25.0ns
• Voltage Supply - Internal: 4.5 V ~ 5.5 V
• Number Of Macrocells: 32
• Number Of I /o: 32
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Voltage: 4.75 V ~ 5.25 V
• Memory Type: EEPROM
• Family Name: ATF1502ASL
• # Macrocells: 32
• Number Of Usable Gates: 750
• Frequency (max): 60MHz
• Propagation Delay Time: 25ns
• Number Of Logic Blocks/elements: 2
• # I/os (max): 32
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Number Of Product Terms Per Macro: 40
• Maximum Operating Frequency: 60 MHz
• Delay Time: 25 ns
• Number Of Programmable I/os: 32
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• For Use With: ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: Compliant

AC Characteristics (Continued)
Notes:
16
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ZX3
XZ
SU
H
FSU
FH
RD
COMB
IC
EN
GLOB
PRE
CLR
UIM
RPA
1. See ordering information for valid part numbers.
2. The t
ATF1502AS(L)
power mode.
Parameter
Output Buffer Enable Delay
(Slow slew rate = ON;
V
Output Buffer Disable Delay (C
Register Setup Time
Register Hold Time
Register Setup Time of Fast Input
Register Hold Time of Fast Input
Register Delay
Combinatorial Delay
Array Clock Delay
Register Enable Time
Global Control Delay
Register Preset Time
Register Clear Time
Switch Matrix Delay
Reduced-power Adder
CCIO
RPA
= 5.0V/3.3V; C
parameter must be added to the t
L
= 35 pF)
(2)
L
= 5 pF)
(1)
LAD
, t
LAC
,t
Min
0.5
TIC
3
2
3
, t
-7
ACL
, and t
Max
10
9
1
3
2
2
4
1
3
1
1
SEXP
Min
0.5
3
3
3
parameters for macrocells running in the reduced-
-10
Max
11
9
5
2
2
5
5
1
3
3
1
Min
4
4
2
2
-15
Max
10
13
6
1
1
6
6
1
4
4
2
Min
6
6
3
5
-25
Max
12
15
0995K–PLD–6/05
8
2
2
8
8
1
6
6
2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns