DSPB56371AF150 Freescale Semiconductor, DSPB56371AF150 Datasheet - Page 13

IC DSP 24BIT 150MHZ 80-LQFP

DSPB56371AF150

Manufacturer Part Number
DSPB56371AF150
Description
IC DSP 24BIT 150MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56371AF150

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
150MHz
Non-volatile Memory
ROM (384 kB)
On-chip Ram
264kB
Voltage - I/o
3.30V
Voltage - Core
1.25V
Operating Temperature
-40°C ~ 115°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Product
DSPs
Data Bus Width
24 bit
Processor Series
DSP563xx
Core
56000
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
150 MIPs
Maximum Clock Frequency
150 MHz
Program Memory Size
192 KB
Data Ram Size
264 KB
Operating Supply Voltage
1.25 V, 3.3 V
Maximum Operating Temperature
+ 115 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPB56371AF150
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSPB56371AF150
Manufacturer:
FREESCALE
Quantity:
20 000
3.2
Freescale Semiconductor
CORE_VDD (4) Core Power—The voltage (1.25 V) should be well-regulated and the input should be provided with
PLLA_VDD (1)
PLLD_VDD (1) PLL Power— The voltage (1.25 V) should be well-regulated and the input should be provided with
PLLP_VDD(1)
Power Name
IO_VDD (5)
Power
3.3V
PLL Power— The voltage (3.3 V) should be well-regulated and the input should be provided with an
extremely low impedance path to the 3.3 V
decoupling capacitors.
an extremely low impedance path to the 1.25 V
external decoupling capacitors.
an extremely low impedance path to the 1.25 V
decoupling capacitors.
SHI, ESAI, ESAI_1, DAX and Timer I/O Power —The voltage (3.3 V) should be well-regulated and
the input should be provided with an extremely low impedance path to the 3.3 V
is an isolated power for the SHI, ESAI, ESAI_1, DAX and Timer I/O. The user must provide adequate
external decoupling capacitors.
SDO5_SDI0_PC7
IO_GND
IO_VDD
SDO3_SDI2_PC8
SDO2_SDI3_PC9
SDO1_PC10
SDO0_PC11
CORE_VDD
PF8
PF6
PF7
CORE_GND
PF2
PF3
PF4
PF5
IO_VDD
PF1
PF0
IO_GND
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
DSP56371 Data Sheet, Rev. 4.1
Figure 3. VDD Connections
GPIO
Table 2. Power Inputs
ESAI
Timer
DD
Description
OnCE
power rail. The user must provide adequate external
DAX
DD
DD
power rail. The user must provide adequate
power rail. The user must provide adequate
SHI
ESAI_1
Int/Mod
PLL
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
Signal/Connection Descriptions
FST_PE4
SDO5_SDI0_PE6
SDO4_SDI1_PE7
SDO3_SDI2_PE8
SDO2_SDI3_PE9
SDO1_PE10
SDO0_PE11
CORE_GND
CORE_VDD
MODB_IRQA
MODB_IRQB
MODC_IRQC
MODD_IRQD
RESET_B
PINIT_NMI
EXTAL
PLLD_VDD
PLLD_GND
PLLP_GND
PLLP_VDD
DD
1.25V
power rail. This
13

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