MSC8113TMP4800V Freescale Semiconductor, MSC8113TMP4800V Datasheet - Page 25
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MSC8113TMP4800V
Manufacturer Part Number
MSC8113TMP4800V
Description
DSP TRI-CORE 431-FCPBGA
Manufacturer
Freescale Semiconductor
Series
MSC81xx StarCorer
Type
SC140 Corer
Datasheet
1.MSC8113TMP3600V.pdf
(44 pages)
Specifications of MSC8113TMP4800V
Interface
Ethernet, I²C, TDM, UART
Clock Rate
400MHz
Non-volatile Memory
External
On-chip Ram
1.436MB
Voltage - I/o
3.30V
Voltage - Core
1.10V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
431-FCPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MSC8113TMP4800V
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.5.5.2
Table 17 describes the
For designs that use the
values specified for
2.5.5.3
Table 17 describes the DMA signal timing.
The DREQ
according to the timings in Table 17. Figure 13 shows synchronous peripheral interaction.
Freescale Semiconductor
Notes:
No.
20
21
23
24
No.
37
38
39
40
41
Rise-to-rise skew
Fall-to-fall skew
CLKOUT phase (1.1 V, 133 MHz)
•
•
CLKOUT phase (1.1 V, 100 MHz)
•
•
1.
2.
3.
4.
signal is synchronized with
DREQ set-up time before the 50% level of the falling edge of REFCLK
DREQ hold time after the 50% level of the falling edge of REFCLK
DONE set-up time before the 50% level of the rising edge of REFCLK
DONE hold time after the 50% level of the rising edge of REFCLK
DACK/DRACK/DONE delay after the 50% level of the REFCLK rising edge
Phase high
Phase low
Phase high
Phase low
A positive number indicates that CLKOUT precedes CLKIN, A negative number indicates that CLKOUT follows CLKIN.
Skews are measured in clock mode 29, with a CLKIN:CLKOUT ratio of 1:1. The same skew is valid for all clock modes.
CLKOUT skews are measured using a load of 10 pF.
CLKOUT skews and phase are not measured for 500/166 Mhz parts because these parts only use CLKIN mode.
CLKIN to CLKOUT Skew
DMA Data Transfers
CLKIN
CLKOUT-
CLKOUT
synchronization. Figure 12 shows the relationship between the
MSC8113 Tri-Core Digital Signal Processor Data Sheet, Rev. 1
to-
synchronization mode, use the skew values listed in Table 16 to adjust the rise-to-fall timing
CLKIN
Characteristic
CLKOUT
REFCLK
Figure 12. CLKOUT and CLKIN Signals.
CLKIN
skew timing.
Characteristic
. To achieve fast response, a synchronized peripheral should assert
Table 16. CLKOUT Skew
Table 17. DMA Signals
20
Min
–1.5
0.0
2.2
2.2
3.3
3.3
CLKOUT
1
21
Min
5.0
0.5
5.0
0.5
0.5
Ref = CLKIN
Electrical Characteristics
and
CLKIN
Max
0.95
1.0
—
—
—
—
Max
7.5
—
—
—
—
1
timings.
DREQ
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25