ADSP-2186KSTZ-133 Analog Devices Inc, ADSP-2186KSTZ-133 Datasheet - Page 18

IC DSP CONTROLLER 16BIT 100LQFP

ADSP-2186KSTZ-133

Manufacturer Part Number
ADSP-2186KSTZ-133
Description
IC DSP CONTROLLER 16BIT 100LQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2186KSTZ-133

Interface
Host Interface, Serial Port
Clock Rate
33.3MHz
Non-volatile Memory
External
On-chip Ram
40kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Device Core Size
16b
Format
Fixed Point
Clock Freq (max)
33.3MHz
Mips
33.3
Device Input Clock Speed
33.3MHz
Ram Size
40KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADSP-2186
Parameter
Bus Request–Bus Grant
Timing Requirements:
t
t
Switching Characteristics:
t
t
t
t
t
t
NOTES
xMS = PMS, DMS, CMS, IOMS, BMS.
1
2
BH
BS
SD
SDB
SE
SEC
SDBH
SEH
BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on
the following cycle. Refer to the ADSP-218x DSP Hardware Reference, for BR/BG cycle relationships.
BGH is asserted when the bus is granted and the processor requires control of the bus to continue.
BR Hold after CLKOUT High
BR Setup before CLKOUT Low
CLKOUT High to xMS, RD, WR Disable
xMS, RD, WR Disable to BG Low
BG High to xMS, RD, WR Enable
xMS, RD, WR Enable to CLKOUT High
xMS, RD, WR Disable to BGH Low
BGH High to xMS, RD, WR Enable
PMS, DMS
CLKOUT
BMS, RD
CLKOUT
BGH
WR
BG
BR
t
SD
t
BH
1
1
t
t
BS
t
SDBH
SDB
2
2
Min
0.25 t
0.25 t
0
0
0.25 t
0
0
CK
CK
CK
+ 2
+ 17
– 7
t
t
SEH
SE
t
SEC
Max
0.25 t
CK
+ 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns

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