XC3S500E-4FGG320C Xilinx Inc, XC3S500E-4FGG320C Datasheet - Page 196

IC SPARTAN-3E FPGA 500K 320FBGA

XC3S500E-4FGG320C

Manufacturer Part Number
XC3S500E-4FGG320C
Description
IC SPARTAN-3E FPGA 500K 320FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S500E-4FGG320C

Total Ram Bits
368640
Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Number Of I /o
232
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
320-BGA
No. Of Logic Blocks
10476
No. Of Gates
500000
No. Of Macrocells
10476
No. Of Speed Grades
4
No. Of I/o's
250
Clock Management
DLL
Package
320FBGA
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
232
Ram Bits
368640
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1536 - KIT STARTER SPARTAN-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1526

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0
Pinout Descriptions
Table 143: FT256 Package Pinout (Continued)
196
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
N.C. ( )
IO_L09N_2/D6/GCLK13
IO_L09P_2/D7/GCLK12
IO_L10N_2/D3/GCLK15
IO_L10P_2/D4/GCLK14
IO_L12N_2/D1/GCLK3
IO_L12P_2/D2/GCLK2
IO_L13N_2/DIN/D0
IO_L13P_2/M0
N.C. ( )
N.C. ( )
IO_L15N_2
IO_L15P_2
IO_L16N_2/A22
IO_L16P_2/A23
IO_L18N_2/A20
IO_L18P_2/A21
IO_L19N_2/VS1/A18
IO_L19P_2/VS2/A19
IO_L20N_2/CCLK
IO_L20P_2/VS0/A17
IP
IP
IP_L02N_2
IP_L02P_2
IP_L08N_2/VREF_2
IP_L08P_2
IP_L11N_2/M2/GCLK1
IP_L11P_2/RDWR_B/
GCLK0
IP_L17N_2
IP_L17P_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
XC3S250E Pin Name
IO_L07P_2
IO_L09N_2/D6/GCLK13
IO_L09P_2/D7/GCLK12
IO_L10N_2/D3/GCLK15
IO_L10P_2/D4/GCLK14
IO_L12N_2/D1/GCLK3
IO_L12P_2/D2/GCLK2
IO_L13N_2/DIN/D0
IO_L13P_2/M0
IO_L14N_2/VREF_2
IO_L14P_2
IO_L15N_2
IO_L15P_2
IO_L16N_2/A22
IO_L16P_2/A23
IO_L18N_2/A20
IO_L18P_2/A21
IO_L19N_2/VS1/A18
IO_L19P_2/VS2/A19
IO_L20N_2/CCLK
IO_L20P_2/VS0/A17
IP
IP
IP_L02N_2
IP_L02P_2
IP_L08N_2/VREF_2
IP_L08P_2
IP_L11N_2/M2/GCLK1
IP_L11P_2/RDWR_B/
GCLK0
IP_L17N_2
IP_L17P_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
XC3S500E Pin Name
www.xilinx.com
IO_L07P_2
IO_L09N_2/D6/GCLK13
IO_L09P_2/D7/GCLK12
IO_L10N_2/D3/GCLK15
IO_L10P_2/D4/GCLK14
IO_L12N_2/D1/GCLK3
IO_L12P_2/D2/GCLK2
IO_L13N_2/DIN/D0
IO_L13P_2/M0
IO_L14N_2/VREF_2
IO_L14P_2
IO_L15N_2
IO_L15P_2
IO_L16N_2/A22
IO_L16P_2/A23
IO_L18N_2/A20
IO_L18P_2/A21
IO_L19N_2/VS1/A18
IO_L19P_2/VS2/A19
IO_L20N_2/CCLK
IO_L20P_2/VS0/A17
IP
IP
IP_L02N_2
IP_L02P_2
IP_L08N_2/VREF_2
IP_L08P_2
IP_L11N_2/M2/GCLK1
IP_L11P_2/RDWR_B/
GCLK0
IP_L17N_2
IP_L17P_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
XC3S1200E Pin Name
DS312-4 (v3.8) August 26, 2009
FT256
M10
M11
Ball
R10
P10
N10
P11
R11
N12
P12
R13
R14
P14
N11
R12
T13
T14
L10
M8
M9
N7
P8
N8
N9
P9
R3
R7
R9
R5
L8
L9
T2
T3
T7
T9
L7
Product Specification
1200E: VREF
DUAL/GCLK
DUAL/GCLK
DUAL/GCLK
DUAL/GCLK
DUAL/GCLK
DUAL/GCLK
500E: VREF
DUAL/GCLK
DUAL/GCLK
250E: N.C.
250E: N.C.
250E: N.C.
1200E: I/O
1200E: I/O
500E: I/O
500E: I/O
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
VREF
Type
I/O
I/O
R

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