EP2SGX60EF1152I4 Altera, EP2SGX60EF1152I4 Datasheet - Page 174

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152I4

Manufacturer Part Number
EP2SGX60EF1152I4
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152I4

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2186

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX60EF1152I4
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2SGX60EF1152I4
Manufacturer:
ALTERA
0
Part Number:
EP2SGX60EF1152I4N
Manufacturer:
ALTERA
Quantity:
534
Part Number:
EP2SGX60EF1152I4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2SGX60EF1152I4N
Manufacturer:
ALTERA
0
Part Number:
EP2SGX60EF1152I4N
Manufacturer:
ALTERA
Quantity:
300
Part Number:
EP2SGX60EF1152I4N
0
Operating Conditions
4–4
Stratix II GX Device Handbook, Volume 1
Notes to
(1)
(2)
V
V
V
V
V
V
V
R
Reference clock
Input
frequency from
REFCLK
Input
frequency from
PLD input
Input clock
jitter
Absolute V
for a
pin
Table 4–5. Stratix II GX Transceiver Block Operating Conditions
Table 4–6. Stratix II GX Transceiver Block AC Specification (Part 1 of 6)
CCA
CCP
CCR
CCT
CCT_B
CCL
CCH_B
REF
Description
Symbol /
(12)
Symbol
The DC signal on this pin must be as clean as possible. Ensure that no noise is coupled to this pin.
Refer to the Stratix II GX Device Handbook,
REFCLK
(1)
(2)
Table
input
M A X
4–5:
Transceiver block supply
voltage
Transceiver block supply
voltage
Transceiver block supply
voltage
Transceiver block supply
voltage
Transceiver block supply
voltage
Transceiver block supply
voltage
Transceiver block supply
voltage
Reference resistor
Conditions
Parameter
Refer to
reference clock.
-3 Speed Commercial
Min
50
50
-
Speed Grade
Table 4–20 on page 4–36
Typ
volume
-
-
-
Commercial
and industrial
Commercial
and industrial
Commercial
and industrial
Commercial
and industrial
Commercial
and industrial
Commercial
and industrial
Commercial
and industrial
and industrial
Commercial
Conditions
622.08
2, for more information.
Max
325
3.3
-4 Speed Commercial
and Industrial Speed
Min
50
50
-
2000 –1%
Minimum
for the input jitter specifications for the
3.135
1.425
1.15
1.15
1.15
1.15
1.15
1.15
Grade
Typ
-
-
-
622.08
Max
325
3.3
Typical
2000
3.3
1.2
1.2
1.2
1.2
1.2
1.2
1.5
-5 Speed Commercial
Min
50
50
-
Altera Corporation
Maximum
2000 +1%
Speed Grade
3.465
1.575
1.25
1.25
1.25
1.25
1.25
1.25
Typ
-
-
-
June 2009
622.08
Units
Max
325
3.3
V
V
V
V
V
V
V
V
Ω
MHz
MHz
Unit
V

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