EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 24
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Table 1–23. Transceiver Specifications for Stratix IV GX Devices (Part 3 of 9)
April 2011 Altera Corporation
Receiver
Supported I/O
Standards
Data rate (Single width,
non-PMA Direct)
Data rate (Double
width, non-PMA Direct)
Data rate (Single width,
PMA Direct)
Data rate (Double
width, PMA Direct)
Absolute V
receiver pin
Operational V
receiver pin
Absolute V
receiver pin
Maximum peak-to-peak
differential input voltage
V
device configuration
Maximum peak-to-peak
differential input voltage
V
device configuration
Minimum differential
eye opening at receiver
serial input pins
V
Receiver DC Coupling
Support
ID
ID
ICM
(diff p-p) before
(diff p-p) after
Description
Symbol/
MAX
MIN
(5)
MAX
for a
for a
for a
(20)
Equalization = 0
Equalization = 0
DC gain = 0 dB
DC gain = 0 dB
V
V
600 Mbps to
Data Rate =
V
V
Conditions
setting
setting
ICM
ICM
Data Rate
ICM
> 5 Gbps
ICM
setting
5 Gbps
setting
= 0.82 V
= 0.82 V
—
—
—
—
—
—
—
—
= 1.1 V
—
=1.1 V
(6)
(6)
1000
1000
-0.4
Min
600
600
100
165
—
—
—
—
—
For more information about receiver DC coupling support, refer to the “DC-Coupled
–2 Commercial
Speed Grade
1100 ± 10%
1.4 V PCML, 1.5 V PCML, 2.5 V PCML, LVPECL, LVDS
820 ± 10%
Links” section in the
Typ
—
—
—
—
—
—
—
—
—
—
—
—
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
3750
8500
3250
6500
Max
1.6
1.5
1.6
2.7
1.6
—
—
—
1000
1000
Transceiver Architecture in Stratix IV Devices
Min
600
600
-0.4
100
165
Commercial/Industrial
—
—
—
—
—
Speed Grade
–2× Commercial
1100 ± 10%
820 ± 10%
Typ
—
—
—
—
—
—
—
—
—
—
—
—
and
–3
(1)
3750
6500
3250
6500
Max
1.6
1.5
1.6
2.7
1.6
—
—
—
1000
1000
Commercial/Industrial
Min
-0.4
600
600
165
165
—
—
—
—
—
Speed Grade
1100 ± 10%
820 ± 10%
Typ
—
—
—
—
—
—
—
—
—
—
—
—
–4
1–16
3750
6375
3250
6375
Max
chapter.
(22)
1.6
1.5
1.6
2.7
1.6
—
—
—
Mbps
Mbps
Mbps
Mbps
Unit
mV
mV
mV
mV
V
V
V
V
V
V