XC5VLX30-1FF676C Xilinx Inc, XC5VLX30-1FF676C Datasheet - Page 171

• Manufacturer Part Number: XC5VLX30-1FF676C
• Description: IC FPGA VIRTEX-5 30K 676FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX30-1FF676C

• Number Of Logic Elements/cells: 30720
• Number Of Labs/clbs: 2400
• Total Ram Bits: 1179648
• Number Of I /o: 400
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA, FCBGA
• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 30720
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 400
• Ram Bits: 1179648
• For Use With: HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Legal Block RAM and FIFO Combinations
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM ECC VHDL and Verilog Templates
VHDL and Verilog templates are available in the Libraries Guide.
The block RAM–FIFO combinations shown in
RAMB36 primitive. When placing block RAM and FIFO primitives in the same location,
the FIFO must occupy the lower port.
X-Ref Target - Figure 4-33
RAMB18
RAMB18
Figure 4-33: Legal Block RAM and FIFO Combinations
www.xilinx.com
RAMB18SDP
RAMB18SDP
Legal Block RAM and FIFO Combinations
Figure 4-33
RAMB18
FIFO18
are supported in a single
RAMB18SDP
FIFO18_36
ug0190_4_35_050208
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