XC5VLX30-1FF676C Xilinx Inc, XC5VLX30-1FF676C Datasheet - Page 50

• Manufacturer Part Number: XC5VLX30-1FF676C
• Description: IC FPGA VIRTEX-5 30K 676FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX30-1FF676C

• Number Of Logic Elements/cells: 30720
• Number Of Labs/clbs: 2400
• Total Ram Bits: 1179648
• Number Of I /o: 400
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA, FCBGA
• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 30720
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 400
• Ram Bits: 1179648
• For Use With: HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 2: Clock Management Technology
DCM Primitives
50
DCM_BASE Primitive
The DCM primitives DCM_BASE and DCM_ADV are shown in
X-Ref Target - Figure 2-2
The DCM_BASE primitive accesses the basic frequently used DCM features and simplifies
the user-interface ports. The clock deskew, frequency synthesis, and fixed-phase shifting
features are available to use with DCM_BASE.
DCM_BASE primitive.
Table 2-2: DCM_BASE Primitive
Clock Input
Control and Data Input
Clock Output
Status and Data Output
Available Ports
CLKIN
CLKFB
RST
DCM_BASE
www.xilinx.com
CLKFX180
CLK2X180
LOCKED
CLKIN, CLKFB
RST
CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, CLKDV,
CLKFX, CLKFX180
LOCKED
CLK180
CLK270
CLKDV
CLK2X
CLKFX
CLK90
Figure 2-2: DCM Primitives
CLK0
Table 2-2
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
Port Names
DCM_ADV
lists the available ports in the
CLKFX180
CLK2X180
PSDONE
LOCKED
DO[15:0]
CLK180
CLK270
CLKDV
CLKFX
CLK2X
CLK90
Figure
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DRDY
CLK0
ug190_2_02_042706
2-2.