XC5VSX50T-3FF1136C Xilinx Inc, XC5VSX50T-3FF1136C Datasheet - Page 354
![IC FPGA VIRTEX-5 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX50T-3FF1136C
Manufacturer Part Number
XC5VSX50T-3FF1136C
Description
IC FPGA VIRTEX-5 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX50T-3FF1136C
Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX50T-3FF1136C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Chapter 8: Advanced SelectIO Logic Resources
354
ISERDES Primitive (ISERDES_NODELAY)
•
Figure 8-1
components and features of the block.
X-Ref Target - Figure 8-1
The ISERDES primitive in Virtex-5 devices (shown in
X-Ref Target - Figure 8-2
Dedicated support for Networking interfaces.
CLKDIV
OCLK
Bitslip
CE1
CE2
CLK
RST
D
shows the block diagram of the ISERDES, highlighting all the major
BITSLIP
CE1
CE2
CLK
CLKDIV
D
OCLK
SHIFTIN1
SHIFTIN2
RST
CLKB
Figure 8-2: ISERDES_NODELAY Primitive
Figure 8-1: ISERDES Block Diagram
www.xilinx.com
Module
CE
ISERDES_NODELAY
Primitive
Serial to Parallel
Converter
Figure
BITSLIP
Module
8-2) is ISERDES_NODELAY.
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
ug190_8_02_112607
Q1
Q2
Q3
Q4
Q5
Q6
SHIFTOUT1
SHIFTOUT2
ug190_8_01_050906
SHIFTIN1/2
SHIFTOUT1/2
Q1 - Q6
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