Z85C3008VSG Zilog, Z85C3008VSG Datasheet - Page 134
Z85C3008VSG
Manufacturer Part Number
Z85C3008VSG
Description
IC 8MHZ Z8500 CMOS SCC 44-PLCC
Manufacturer
Zilog
Series
SCCr
Specifications of Z85C3008VSG
Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Cpu Speed
8MHz
Digital Ic Case Style
LCC
No. Of Pins
44
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
85
Rohs Compliant
Yes
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3932
Z85C3008VSG
Z85C3008VSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z85C3008VSG
Manufacturer:
Zilog
Quantity:
800
Company:
Part Number:
Z85C3008VSG
Manufacturer:
MAX
Quantity:
74
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UM010901-0601
5.3.12 Read Register 11 (ESCC and 85C30
Only)
On the ESCC, Read Register 11 reflects the contents of
Write Register 10 provided the Extended Read option has
been enabled. Otherwise, this register returns an image of
RR15.
On the NMOS/CMOS version, a read to this location re-
turns an image of RR15.
5.3.13 Read Register 12
RR12 returns the value stored in WR12, the lower byte of
the time constant, for the BRG. Figure 5-26 shows the bit
positions for RR12.
5.3.14 Read Register 13
RR13 returns the value stored in WR13, the upper byte of
the time constant for the BRG. Figure 5-27 shows the bit
positions for RR13.
Read Register 13
Read Register 12
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Figure 5-26. Read Register 12
Figure 5-27. Read Register 13
TC8
TC9
TC10
TC11
TC12
TC13
TC14
TC15
TC0
TC1
TC2
TC3
TC4
TC5
TC6
TC7
Lower Byte
of Time Constant
Upper Byte
of Time Constant
5.3.15 Read Register 14 (ESCC and 85C30
Only)
On the ESCC, Read Register 14 reflects the contents of
Write Register 7 Prime provided the Extended Read option
has been enabled. Otherwise, this register returns an im-
age of RR10.
On the NMOS/CMOS version, a read to this location re-
turns an image of RR10.
5.3.16 Read Register 15
RR15
External/Status IE bits. The two unused bits are always
returned as Os. Figure 5-28 shows the bit positions for
RR15.
Read Register 15
D7 D6 D5 D4
reflects
Figure 5-28. Read Register 15
the
D3 D2 D1 D0
value
SCC™/ESCC™ User’s Manual
stored
Register Descriptions
0
Zero Count IE
0
DCD IE
Sync/Hunt IE
CTS IE
Tx Underrun/EOM IE
Break/Abort IE
in
WR15,
5-27
the
5
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