EZ80190AZ050SG Zilog, EZ80190AZ050SG Datasheet - Page 130

IC WEBSERVER 8 BIT 50MHZ 100LQFP

EZ80190AZ050SG

Manufacturer Part Number
EZ80190AZ050SG
Description
IC WEBSERVER 8 BIT 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80190AZ050SG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80190x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3866
EZ80190AZ050SG

Available stocks

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Manufacturer
Quantity
Price
Part Number:
EZ80190AZ050SG
Manufacturer:
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EZ80190AZ050SG
Manufacturer:
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Quantity:
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Table 59. State Progression of the MACC During Operation (Continued)
PS006614-1208
EMPTY
READY
DONE
DATA
Bank
Current State
PROGRESS
EMPTY
DONE
CALC
Bank
IN
1. Define a new calculation by loading the MACC
2. Any write to MACC_AC4 produces the same
When the MACC completes execution of the
current calculation, the banks swap. The DATA
bank status changes to DONE to indicate the
availability of the just completed calculation. The
MACC begins the new calculation so the CALC
bank status remains IN PROGRESS.
1. Read the result from the MACC Accumulator
2. Any read from MACC_AC4 produces the same
3. Any write to any MACC register except for
control registers using the OTI2R instruction.
When the OTI2R instruction completes and the
last write is to either MACC_CTL or any byte of
MACC_ACx, the banks swap and a new
calculation begins. The CALC bank status
changes from DONE to IN PROGRESS as it
begins the new calculation. The DATA bank
status changes from EMPTY to DONE as it now
contains the result of the previous calculation.
effect.
registers using the INI2R instruction. When the
INI2R instruction completes and the last read is
from any byte of MACC_ACx, the DATA bank
status changes from DONE to EMPTY.
effect.
MAC_STAT produces the same effect.
Operation
Product Specification
EMPTY
DONE
DONE
DATA
Bank
Next State
Multiply-Accumulator
PROGRESS
PROGRESS
EMPTY
CALC
Bank
eZ80190
IN
IN
120

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