MPC8379EVRAJF Freescale Semiconductor, MPC8379EVRAJF Datasheet - Page 15

• Manufacturer Part Number: MPC8379EVRAJF
• Description: MPU PWRQUICC II 533MHZ 689TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8379EVRAJF

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 533MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 689-TePBGA II
• Maximum Clock Frequency: 533 MHz
• Operating Supply Voltage: 1.8 V to 2.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 533MHz
• Embedded Interface Type: DUART, HSSI, I2C, IPIC, JTAG, SPI, USB
• Digital Ic Case Style: BGA
• No. Of Pins: 689
• Rohs Compliant: Yes
• For Use With: MPC8377E-RDBA - BOARD REF DES MPC8377 REV 2.1MPC8377E-MDS-PB - BOARD MODULAR DEV SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5
This section describes the DC and AC electrical specifications for the reset initialization timing and
electrical requirements of the MPC8377E.
5.1
Table 10
5.2
Table 11
Freescale Semiconductor
Input high voltage
Input low voltage
Input current
Output high voltage
Output low voltage
Output low voltage
Note:
Required assertion time of HRESET to activate reset flow
Required assertion time of PORESET with stable clock applied to CLKIN when
the device is in PCI host mode
Required assertion time of PORESET with stable clock applied to PCI_CLK when
the device is in PCI agent mode
HRESET assertion (output)
HRESET negation to negation (output)
Input setup time for POR config signals (CFG_RESET_SOURCE[0:3],
CFG_CLKIN_DIV, and CFG_LBMUX) with respect to negation of PORESET
when the device is in PCI host mode
Input setup time for POR config signals (CFG_RESET_SOURCE[0:3],
CFG_CLKIN_DIV, and CFG_LBMUX) with respect to negation of PORESET
when the device is in PCI agent mode
Input hold time for POR config signals with respect to negation of HRESET
• This table applies for pins PORESET and HRESET. The PORESET is input pin, thus stated output voltages are not relevant.
• HRESET and SRESET are open drain pin, thus V
RESET Initialization
provides the reset initialization AC timing specifications of the device.
provides the DC electrical characteristics for the RESET pins of the device.
RESET DC Electrical Characteristics
RESET AC Electrical Characteristics
Characteristic
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Parameter/Condition
Table 11. RESET Initialization Timing Specifications
Table 10. RESET Pins DC Electrical Characteristics
Symbol
V
V
V
V
V
I
OH
IN
OL
OL
IH
IL
OH
is not relevant for these pins.
I
OH
I
I
OL
OL
Condition
= –8.0 mA
= 3.2 mA
= 8.0 mA
—
—
—
Min
512
32
32
32
16
4
4
0
–0.3
Min
2.0
2.4
—
—
—
Max
—
—
—
—
—
—
—
—
OV
t
t
t
t
t
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
DD
± 30
Max
t
t
0.8
0.5
0.4
—
CLKIN
CLKIN
Unit
RESET Initialization
ns
+ 0.3
Notes
Unit
μA
V
V
V
V
V
—
1
2
1
1
1
2
1
15