MPC8379EVRAJF Freescale Semiconductor, MPC8379EVRAJF Datasheet - Page 59

MPU PWRQUICC II 533MHZ 689TEPBGA

MPC8379EVRAJF

Manufacturer Part Number
MPC8379EVRAJF
Description
MPU PWRQUICC II 533MHZ 689TEPBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8379EVRAJF

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
689-TePBGA II
Maximum Clock Frequency
533 MHz
Operating Supply Voltage
1.8 V to 2.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
533MHz
Embedded Interface Type
DUART, HSSI, I2C, IPIC, JTAG, SPI, USB
Digital Ic Case Style
BGA
No. Of Pins
689
Rohs Compliant
Yes
For Use With
MPC8377E-RDBA - BOARD REF DES MPC8377 REV 2.1MPC8377E-MDS-PB - BOARD MODULAR DEV SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8379EVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC8379EVRAJF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PCI_SYNC_IN clock input levels are with next levels: VIL = 0.1 × OV
Table 50
Freescale Semiconductor
PCI_SYNC_IN clock input levels are with next levels: VIL = 0.1 × OV
Input hold from cock
Output clock skew
Notes:
1
2
3
4
5
6
Clock to output valid
Output hold from clock
Clock to output high impedance
Input setup to clock
Input hold from clock
Output clock skew
Note:
1
2
3
4
5
6
Note that the symbols used for timing specifications herein follow the pattern of t
(reference)(state)
symbolizes PCI timing (PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN
clock, t
the time hard reset (R) went high (H) relative to the frame signal (F) going to the valid (V) state.
See the timing measurement conditions in the PCI 2.3 Local Bus Specifications.
For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
Input timings are measured at the pin.
PCI specifications allows 1 ns skew for 66 MHz but includes the total allowed skew, board, connectors, etc.
Value does not comply with the PCI 2.3 Local Bus Specifications.
Note that the symbols used for timing specifications herein follow the pattern of t
(reference)(state)
symbolizes PCI timing (PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN
clock, t
the time hard reset (R) went high (H) relative to the frame signal (F) going to the valid (V) state.
See the timing measurement conditions in the PCI 2.3 Local Bus Specifications.
For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
Input timings are measured at the pin.
PCI specifications allows 2 ns skew for 33 MHz but includes the total allowed skew, board, connectors, etc.
Value does not comply with the PCI 2.3 Local Bus Specifications.
SYS
SYS
shows the PCI AC timing specifications at 33 MHz.
, reference (K) going to the high (H) state or setup time. Also, t
, reference (K) going to the high (H) state or setup time. Also, t
for inputs and t
for inputs and t
Parameter
Parameter
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Table 49. PCI AC Timing Specifications at 66 MHz (continued)
(first two letters of functional block)(reference)(state)(signal)(state)
(first two letters of functional block)(reference)(state)(signal)(state)
Table 50. PCI AC Timing Specifications at 33 MHz
Symbol
t
Symbol
t
t
t
t
PCKOSK
t
PCKHOV
PCKHOX
PCIXKH
t
t
PCKHOZ
PCKOSK
PCIVKH
PCIXKH
DD
DD
, VIH = 0.7 × OV
, V
1
1
IH
= 0.7 × OV
0.25
PCRHFV
Min
PCRHFV
0.25
Min
3.0
2
DD
DD
.
.
(first two letters of functional block)(signal)(state)
symbolizes PCI timing (PC) with respect to
symbolizes PCI timing (PC) with respect to
(first two letters of functional block)(signal)(state)
for outputs. For example, t
for outputs. For example, t
Max
0.5
Max
0.5
11
14
Unit
ns
ns
Unit
ns
ns
ns
ns
ns
ns
PCIVKH
PCIVKH
Notes
2, 4, 6
Notes
2, 4, 6
2, 3
2, 4
5
2
2
5
PCI
59

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