IDT79RC32K438-266BB IDT, Integrated Device Technology Inc, IDT79RC32K438-266BB Datasheet - Page 16

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IDT79RC32K438-266BB

Manufacturer Part Number
IDT79RC32K438-266BB
Description
IC MPU 32BIT CORE 266MHZ 416-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Interprise™r
Datasheet

Specifications of IDT79RC32K438-266BB

Processor Type
MIPS32 32-Bit
Speed
266MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
416-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
79RC32K438-266BB

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IDT 79RC32438
MDATA[7]
MDATA[8]
MDATA[11:9]
MDATA[12]
MDATA[15:13]
Signal
Boot Device Width. This field specifies the width of the boot device (i.e., Device 0).
0x0 - 8-bit boot device width
0x1 - 16-bit boot device width
Reset Mode. This bit specifies the length of time the RSTN signal is driven.
0x0 - Normal reset: RSTN driven for minimum of 4096 clock cycles
0x1 - reserved
PCI Mode. This bit controls the operating mode of the PCI bus interface. The initial
value of the EN bit in the PCIC register is determined by the PCI mode.
0x0 - Disabled (EN initial value is zero)
0x1 - PCI satellite mode with PCI target not ready (EN initial value is one)
0x2 - PCI satellite mode with suspended CPU execution (EN initial value is one)
0x3 - PCI host mode with external arbiter (EN initial value is zero)
0x4 - PCI host mode with internal arbiter using fixed priority arbitration algorithm
0x5 - PCI host mode with internal arbiter using round robin arbitration algorithm
0x6 - reserved
0x7 - reserved
Disable Watchdog Timer. When this bit is set, the watchdog timer is disabled follow-
ing a cold reset.
0x0 - Watchdog timer enabled
0x1 - Watchdog timer disabled
Reserved. These pins must be driven low during boot configuration.
Table 3 Boot Configuration Encoding (Part 2 of 2)
(EN initial value is zero)
(EN initial value is zero)
16 of 59
Name/Description
May 25, 2004

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