MPC8313VRADDB Freescale Semiconductor, MPC8313VRADDB Datasheet - Page 62
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MPC8313VRADDB
Manufacturer Part Number
MPC8313VRADDB
Description
MPU POWERQUICC II PRO 516-PBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQAFFB.pdf
(100 pages)
Specifications of MPC8313VRADDB
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
267MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8313E-RDB
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
- 0.3 V to + 1.26 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
16 KB
I/o Voltage
2.5 V
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
Program Memory Type
EEPROM/Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8313VRADDB
Manufacturer:
MOTOLOLA
Quantity:
885
Company:
Part Number:
MPC8313VRADDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
SPI
Figure 53
Figure 54
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 54
62
SPI inputs—slave mode (external clock) input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of SYS_CLK_IN to the 50% level of the signal.
2. The symbols used for timing specifications follow the pattern of t
Timings are measured at the pin.
inputs and t
outputs internal timing (NI) for the time t
valid (V).
Note: The clock edge is selectable on SPI.
Output Signals:
SPICLK (Input)
provides the AC test load for the SPI.
and
shows the SPI timing in slave mode (external clock).
Input Signals:
(first two letters of functional block)(reference)(state)(signal)(state)
(See Note)
(See Note)
SPIMOSI
SPIMISO
Figure 55
MPC8313E PowerQUICC
Figure 54. SPI AC Timing in Slave Mode (External Clock) Diagram
Characteristic
Output
represent the AC timing from
t
NEIVKH
Table 62. SPI AC Timing Specifications
SPI
memory clock reference (K) goes from the high state (H) until outputs (O) are
Figure 53. SPI AC Test Load
™
Z
0
II Pro Processor Hardware Specifications, Rev. 3
= 50 Ω
t
NEKHOV
t
NEIXKH
Table
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
62. Note that although the specifications
Symbol
t
NEIXKH
R
L
= 50 Ω
2
1
NV
Min
2
DD
NIKHOV
/2
Freescale Semiconductor
symbolizes the NMSI
Max
—
Unit
ns
for