MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 278

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

SAPI—Source Address Pointer Increment
DAPI—Destination Address Pointer Increment
SSIZE—Source Size Control Field
6-28
Dual-Address Mode—This bit defines which device generates requests.
This field controls the size of the source (read) bus cycle that the DMA channel is
running. Table 6-2 defines these bits.
1 = If request generation is programmed to be external (REQ = 1x), the source
0 = If request generation is programmed to be external (REQ = 1x), the destination
1 = The SAR is incremented by 1, 2, or 4 after each transfer, according to the source
0 = The SAR is not incremented during operand transfer. The address that is written
1 = The DAR is incremented by 1, 2, or 4 after each transfer, according to the source
0 = The DAR is not incremented during operand transfer. The address that is written
device generates the request, and the control signals ( DREQ , DACK , and
DONE ) are part of the source (read) portion of the transfer.
device generates the request, and the control signals ( DREQ , DACK , and
DONE ) are part of the destination (write) portion of the transfer.
size. The address that is written into the SAR points to a memory block and is
incremented to complete the data transfer.
into the SAR points to a peripheral device and is used for the complete data
transfer.
size. The address that is written into the DAR points to a memory block and is
incremented to complete the data transfer.
into the DAR points to a peripheral device and is used for the complete data
transfer.
Freescale Semiconductor, Inc.
For More Information On This Product,
*External logic is required to complete a long-
word transfer.
Table 6-2. SSIZEx Encoding
Bit 9
0
0
1
1
MC68340 USER’S MANUAL
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Bit 8
0
1
0
1
Long Word*
Definition
Not Used
Word
Byte
MOTOROLA