MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 133

• Manufacturer Part Number: MC68340AG25E
• Description: IC MPU 32BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG25E

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

4.4 MC68340 INITIALIZATION SEQUENCE
The following paragraphs discuss a suggested method for initializing the MC68340 after
power-up.
4.4.1 Startup
RESET is asserted by the MC68340 during the time in which V
is locking onto the frequency, and the MC68340 is going through the reset operation. After
RESET is negated, four bus cycles are run, with global CS0 being asserted to fetch the
32-bit supervisor stack pointer (SSP) and the 32-bit program counter (PC) from the boot
ROM. Until programmed differently, CS0 is a global, 16-bit-wide, three-wait-state chip
select. CS0 can be programmed to continue decode for a range of addresses after the
V-bit is set, provided the desired address range is first loaded into the CS0 base address
register. After the V-bit is set for CS0 , global chip select can only be restarted with a
system reset.
After the SSP and the PC are fetched, the module base address register (MBAR) should
be initialized, and the MBAR V-bit should be set (CPU space address $0003FF00) with
the desired base address for the internal modules.
4.4.2 SIM40 Module Configuration
The order of the following SIM40 register initializations is not important; however, time can
be saved by initializing the SYNCR first to quickly increase to the desired processor
operating frequency. The module base address register must be initialized prior to any of
following steps.
Clock Synthesizer Control Register (SYNCR):
Module Configuration Register (MCR)
Autovector Register (AVR)
4-36
• Set frequency control bits (W, X, Y) to specify frequency.
• Select action taken during loss of crystal (RSTEN bit): activate a system reset or
• Select system clock and CLKOUT during LPSTOP (STSIM and STEXT bits).
• If using the software watchdog, periodic interrupt timer, and/or the bus monitor, select
• Select port B configuration (FIRQ bit). Note that this bit is used in combination with
• Select the access privilege for the supervisor/user registers (SUPV bit).
• Select the interrupt arbitration level for the SIM40 (IARBx bits).
• Select the desired external interrupt levels for internal autovectoring.
operate in limp mode.
action taken when FREEZE is asserted (FRZx bits).
the bits in the PPARB to program the function of the port B pins.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Go to: www.freescale.com
CC
is ramping up, the VCO
MOTOROLA