MC68020EH16E Freescale Semiconductor, MC68020EH16E Datasheet - Page 142

• Manufacturer Part Number: MC68020EH16E
• Description: IC MPU 32BIT 33MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68020EH16E

• Processor Type: M680x0 32-Bit
• Speed: 166MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16.67MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor, Inc.
For the MC68020, if no higher priority interrupt has been synchronized, the IPEND signal
is negated during state 0 (S0) of an interrupt acknowledge cycle, and the IPL2–IPL0
signals for the interrupt being acknowledged can be negated at this time. For the
MC68EC020, if no higher priority interrupt has been synchronized, the IPL2–IPL0 signals
for the interrupt being acknowledged can be negated at this time. Refer to Section 5 Bus
Operation for more information on interrupt acknowledge cycles.
When processing an interrupt exception, the MC68020/EC020 first makes an internal copy
of the SR, sets the privilege level to supervisor, suppresses tracing, and sets the
processor interrupt mask level to the level of the interrupt being serviced. The processor
attempts to obtain a vector number from the interrupting device using an interrupt
acknowledge bus cycle with the interrupt level number output on pins A3–A1 of the
address bus. For a device that cannot supply an interrupt vector, the AVEC signal can be
asserted, and the MC68020/EC020 uses an internally generated autovector, which is one
of vector numbers 31–25, that corresponds to the interrupt level number. If external logic
indicates a bus error during the interrupt acknowledge cycle, the interrupt is considered
spurious, and the processor generates the spurious interrupt vector number (24). Refer to
Section 5 Bus Operation for complete interrupt bus cycle information.
Once the vector number is obtained, the processor saves the exception vector offset, PC
value, and the internal copy of the SR on the active supervisor stack. The saved value of
the PC is the logical address of the instruction that would have been executed had the
interrupt not occurred. If the interrupt was acknowledged during the execution of a
coprocessor instruction, further internal information is saved on the stack so that the
MC68020/EC020 can continue executing the coprocessor instruction when the interrupt
handler completes execution.
If the M-bit in the SR is set, the processor clears the M-bit and creates a throwaway
exception stack frame on top of the interrupt stack as part of interrupt exception
processing. This second frame contains the same PC value and vector offset as the frame
created on top of the master stack, but has a format number of 1 instead of 0 or 9. The
copy of the SR saved on the throwaway frame is exactly the same as that placed on the
master stack except that the S-bit is set in the version placed on the interrupt stack. (It
may or may not be set in the copy saved on the master stack.) The resulting SR (after
exception processing) has the S-bit set and the M-bit cleared.
The processor loads the address in the exception vector into the PC, and normal
instruction execution resumes after the required prefetches for the interrupt handler
routine.
Most M68000 family peripherals use programmable interrupt vector numbers as part of
the interrupt request/acknowledge mechanism of the system. If this vector number is not
initialized after reset and the peripheral must acknowledge an interrupt request, the
peripheral usually returns the uninitialized interrupt vector number (15).
MOTOROLA
M68020 USER’S MANUAL
6- 17
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