IP-NIOS Altera, IP-NIOS Datasheet - Page 128
IP-NIOS
Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Specifications of IP-NIOS
Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
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4–20
Nios II Processor Reference Handbook
Endian Converter Custom Instruction
Bitswap Custom Instruction
f
To add the floating-point custom instructions to the Nios II processor, select Floating
Point Hardware from the list, and click Add. By default, SOPC Builder includes
floating-point addition, subtraction, and multiplication, but omits the more resource
intensive floating-point division. The Floating Point Hardware wizard, shown in
Figure
hardware.
Figure 4–7. Floating Point Hardware Wizard
Turn on Use floating point division hardware to include floating-point division
hardware. The floating-point division hardware requires more resources than the
other instructions, so you might wish to omit it if your application does not make
heavy use of floating-point division.
Click Finish to add the floating-point custom instructions to the Nios II processor.
For further details on the floating-point custom instructions, refer to the
Architecture
The Nios II processor core offers an endian converter custom instruction to reduce the
time spent performing byte reversal operations.
To add the endian converter custom instruction to the Nios II processor, select Endian
Converter from the list, and click Add.
The endian converter custom instruction takes a 32 bit value and converts the
endianness in a single clock cycle. The Nios II processor core supports little endian so
this custom instruction allows you to convert data shared with a big endian processor
core. It is important to note that this custom instruction does not convert the Nios II
processor core to big endian architecture, it only converts big endian data to little
endian and vice versa.
The Nios II processor core offers a bitswap custom instruction to reduce the time
spent performing bit reversal operations.
4–7, appears, giving you the option to include the floating-point division
chapter of the Nios II Processor Reference Handbook.
Chapter 4: Instantiating the Nios II Processor in SOPC Builder
December 2010 Altera Corporation
Custom Instructions Page
Processor
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