IP-NIOS Altera, IP-NIOS Datasheet - Page 264
IP-NIOS
Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Specifications of IP-NIOS
Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
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Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rC ← rA | rB
or rC, rA, rB
or r6, r7, r8
Calculates the bitwise logical OR of rA and rB and stores the result in rC.
None
R
A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
23
22
21
20
19
C
18
17
16
15
14
0x16
13
12
11
10
9
0
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
bitwise logical or
5
Instruction Set Reference
4
0x3a
3
2
1
0
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