IP-NIOS Altera, IP-NIOS Datasheet - Page 201

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IP-NIOS

Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Datasheets

Specifications of IP-NIOS

Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
Chapter 8: Instruction Set Reference
Instruction Set Reference
bgt
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Pseudo-instruction:
if ((signed) rA > (signed) rB)
then PC ← label
else PC ← PC + 4
bgt rA, rB, label
bgt r6, r7, top_of_loop
If (signed) rA > (signed) rB, then bgt transfers program control to the instruction at label.
bgt is implemented with the blt instruction by swapping the register operands.
branch if greater than signed
Nios II Processor Reference Handbook
8–15

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