MC68020RC20E Freescale Semiconductor, MC68020RC20E Datasheet - Page 146

• Manufacturer Part Number: MC68020RC20E
• Description: IC MICROPROCESSOR 32BIT 114-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68020RC20E

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 114-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 114
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

For the coprocessor midinstruction stack frame, the processor reads the SR, PC,
instruction address, internal register values, and the evaluated effective address from the
stack, restores these values to the corresponding internal registers, and increments the
stack pointer by 20. The processor then reads from the response register of the
coprocessor that initiated the exception to determine the next operation to be performed.
Refer to Section 7 Coprocessor Interface Description for details of coprocessor-related
exceptions.
For both the short and long bus fault stack frames, the processor first checks the format
value on the stack for validity. In addition, for the long stack frame, the processor
compares the version number in the stack with its own version number. The version
number is located in the most significant nibble (bits 15–12) of the word at location SP +
$36 in the long stack frame. This validity check is required in a multiprocessor system to
ensure that the data is properly interpreted by the RTE instruction. The RTE instruction
also reads from both ends of the stack frame to make sure it is accessible. If the frame is
invalid or inaccessible, the processor takes a format error or a bus error exception,
respectively. Otherwise, the processor reads the entire frame into the proper internal
registers, deallocates the stack, and resumes normal processing. Once the processor
begins to load the frame to restore its internal state, the assertion of the BERR signal
MOTOROLA
Figure 6-7. RTE Instruction for Throwaway Four-Word Frame
ERROR EXCEPTION
TAKE FORMAT
Freescale Semiconductor, Inc.
INVALID FORMAT WORD
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Go to: www.freescale.com
M68020 USER’S MANUAL
READ FORMAT WORD
OTHER FORMATS
TEMP
OTHERWISE
OTHERWISE
OTHERWISE
ENTRY
(SP) +
FORMAT CODE = $0 (FOUR-WORD FRAME)
(THROWAWAY FRAME)
FORMAT CODE = $1
SP
SR
SP
PC
SR
EXIT
SP + 6
TEMP
SP + 6
(SP) +
TEMP
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