IDTSTAC9204X3NBEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9204X3NBEB2XR Datasheet - Page 39

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IDTSTAC9204X3NBEB2XR

Manufacturer Part Number
IDTSTAC9204X3NBEB2XR
Description
IC AUDIO CODEC 4CH HD 3.3V 48QFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec, HDr
Datasheet

Specifications of IDTSTAC9204X3NBEB2XR

Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
98 / 103
Dynamic Range, Adcs / Dacs (db) Typ
98 / 95
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9204X3NBEB2XR
IDT™
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
STAC9204/9205
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
3.4.2.7.
[30:23]
[22:16]
[14:8]
[31:4]
[6:0]
[31]
[15]
Bit
Bit
[7]
[3]
[2]
AFG PwrCap
Get
Bitfield Name
Bitfield Name
NumSteps
StepSize
Rsvd3
Rsvd2
Rsvd1
Offset
Mute
Rsvd
D3
D2
Table 31. AFG InAmpCap Command Response Format
Table 33. AFG PwrCap Command Response Format
Table 32. AFG PwrCap Command Verb Format
Verb ID
F00
RW
RW
39
R
R
R
R
R
R
R
R
R
R
Reset
Reset
0x0F
0x00
0x0
0x0
0x5
0x0
0x0
0x0
0x1
0x1
No mute capability
Reserved
Size of each step in the gain range = 1.5dB
Reserved
Number of steps in the gain range = 15
(0dB to 22.5 dB)
Reserved
0dB-step is programmed with this offset
Reserved
Power State D3 is supported.
Allows for lowest possible power consuming
state under software control (and still
properly respond to a subsequent Power
State command).
Power State D2 is supported.
Allows for lowest possible power consuming
state from which it can return to fully on
state within 10 ms.
Payload
0F
STAC9204/9205
Description
Description
See bitfield table.
Response
PC AUDIO
V 1.0 12/06

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