IDTSTAC9205X5NBEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9205X5NBEB2XR Datasheet - Page 184

• Manufacturer Part Number: IDTSTAC9205X5NBEB2XR
• Description: IC AUDIO CODEC 4CH HD 5V 48-QFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec, HDr

Specifications of IDTSTAC9205X5NBEB2XR

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 98 / 103
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 95
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465V
• Package Type: VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9205X5NBEB2XR

IDT™
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
STAC9204/9205
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
6.2.
PCB Layout Recommendations
6.2.1.
An optimum layout is one with all components on the same side of the board, minimizing vias
through other signal layers. Other signal traces should be routed away from the STAC9204/9205.
This includes signal traces just underneath the device, or on layers adjacent to the ground plane
layer used by the device.
Separate analog and digital grounding is recommended. The analog grounds (AVSS (pins 26 and
42)) and the digital grounds (DVSS (pins 4 and 7)) should be tied together at only one place. This tie
should be under the CODEC.
Capacitive coupling is allowed for EMI considerations. Generally, use 0.1 mF capacitors. Make sure
these are spread out in the layout.
Analog ground (AVSS) should be located on all grounding layers. AVSS should be the same shape
on these layers.
Analog audio signals should not escape the AVSS cut.
Analog non-audio signals should not enter the AVSS cut.
Only audio voltage planes (such as AVDD) should be located on the VCC layer.
Analog voltage should be provided from a filtered source. LDO’s are preferred. Ferrite beads are
acceptable. Whichever is used must support current requirements.
Vista WLP Compliance Requirements
The following external components are REQUIRED for Vista WLP compliance.
Required series coupling capacitors on analog I/O signal lines:
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Minimum Premium Desktop Implementations:
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Minimum Premium Mobile Implementations:
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Line Output = 10 mF, 1206, 10 V, X5R (ceramic) or 3.3 mF aluminum electrolytic (or similar).
Headphone Output = 220 mF aluminum electrolytic (or similar).
Microphone or Line Input = 1 mF, 0603, X5R (ceramic) or better.
Line Output = 2.2 mF, 1206, 16 V, X5R (ceramic).
Headphone Output = 100 mF D-Case size (or similar). Larger is better, we usually recom-
mend 220 mF.
Microphone or Line Input = 1 mF, 0603, X5R (ceramic) or better.
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STAC9204/9205
PC AUDIO
V 1.0 12/06