IDT821034DN IDT, Integrated Device Technology Inc, IDT821034DN Datasheet - Page 7

• Manufacturer Part Number: IDT821034DN
• Description: IC PCM CODEC QUAD MPI 52-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PCM Codec/Filterr

Specifications of IDT821034DN

• Data Interface: PCM Audio Interface
• Number Of Adcs / Dacs: 4 / 4
• Sigma Delta: No
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-MQFP, 52-PQFP
• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 5.25V
• Package Type: PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 821034DN

IDT821034 QUAD PCM CODEC WITH PROGRAMMABLE GAIN
CR.7
CR.6
CR.5
CR.4
CR.3
CR.2
CR.1
CR.0
Number of Time Slot
Bit
BCLK Frequency
Bit
7
6
5
4
3
2
1
0
Register Indicator
Mode Select 1
Mode Select 0
CODEC Mode (CR.6 = ‘0’)
SLIC/Gain Mode (CR.6 = ‘1’)
Channel Address 1
Channel Address 0
CODEC Mode (CR.6 = ‘0’)
SLIC Mode (CR.6 = ‘1’, CR.4 = ‘1’)
Gain Mode (CR.6 = ‘1’, CR.4 = ‘0’)
Register Indicator
Time Slot Bit 6
Time Slot Bit 5
Time Slot Bit 4
Time Slot Bit 3
Time Slot Bit 2
Time Slot Bit 1
Time Slot Bit 0
Table 3. Relationship between BCLK Frequency and Time Slot Number
512 kHz
8
Name
Name
Table 1. Description of Configuration Register
Timing Mode Select
SLIC/Gain Mode Select
Transmitter Select
Receiver Select
I/O_1 Configuration
I/O_0 Configuration
CR.1: Transmit/Receive
Select
CR.0: MSB/LSB Select
Table 2. Definition of Time Slot Register
1.544 MHz
24
Value
Always ‘0’
Bit 6-0 indicate which time slot is selected for the transmit/receive channel. Time
Slot 0 is aligned to FS.
7
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
Always ‘1’
A-Law CODEC Mode (This is global setting for all channels.)
SLIC/Gain Mode
Reserved (This mode should not be programmed for normal operation.)
Non-delay Mode (This is global setting for all channels.)
Delay Mode (This is global setting for all channels.)
Gain Mode
SLIC Mode
Select Channel 0 for CODEC or SLIC programming
Select Channel 1 for CODEC or SLIC programming
Select Channel 2 for CODEC or SLIC programming
Select Channel 3 for CODEC or SLIC programming
Channel power down
Channel power up with receive time slot assignment
Channel power up with transmit time slot assignment
Channel power up with both receive and transmit time slot assignment
Configure I/O_1 as an output pin and I/O_0 as an output pin
Configure I/O_1 as an output pin and I/O_0 as an input pin
Configure I/O_1 as an input pin and I/O_0 as an output pin
Configure I/O_1 as an input pin and I/O_0 as an input pin
Receive gain will be adjusted
Transmit gain will be adjusted
Indicates the following 8 bits contain the 7 Least Significant bits of gain
adjustment coefficient
Indicates the following 8 bits contain the 7 Most Significant bits of gain
adjustment coefficient
2.048 MHz
-Law CODEC Mode (This is global setting for all channels.)
32
INDUSTRIAL TEMPERATURE RANGE
Description
4.096 MHz
Description
64
8.192 MHz
128