SE98TK-T NXP Semiconductors, SE98TK-T Datasheet - Page 11

• Manufacturer Part Number: SE98TK-T
• Description: Board Mount Temperature Sensors I2C LOCAL +/- 2OC TS DIMM
• Manufacturer: NXP Semiconductors

Specifications of SE98TK-T

• Temperature Threshold: + 6 C
• Full Temp Accuracy: +/- 4 C
• Package / Case: SOT-908
• Digital Output - Bus Interface: 2-Wire, I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 20 C
• Output Type: Digital
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: SE98TK,118

NXP Semiconductors
SE98_4
Product data sheet
Fig 6.
How SE98 responds to SMBus Alert
SMBus ALERT
host detects
7.7 SMBus time-out
7.8 SMBus Alert
START bit
Table 4.
The SE98 supports the SMBus time-out feature. If the host holds SCL LOW between
25 ms and 35 ms, the SE98 would reset its internal state machine to the bus idle state to
prevent the system bus hang-up. This feature is turned on by default. The SMBus time-out
is disabled by writing a logic 1 to bit 7 of register 22h.
Remark: When SMBus time-out is enabled, the I
the SMBus time-out timer, and goes down to only 10 kHz.
The SE98 supports SMBus Alert when it is programmed for the Interrupt mode and when
the EVENT polarity bit is set to logic 0. The EVENT pin can be ANDed with other EVENT
or ALERT signals from other slave devices to signal their intention to communicate with
the host controller. When the host detects EVENT or ALERT signal LOW, it issues an
Alert Response Address (ARA) to which a slave device would respond with its address.
When there are multiple slave devices generating an Alert the SE98 performs bus
arbitration. If it wins the bus, it responds to the ARA and then clears the EVENT pin.
Remark: Either in comparator mode or when the SE98 crosses the critical temperature,
the host must also read the EVENT status bit and provide remedy to the situation by
bringing the temperature to within the alarm window or below the critical temperature if
that bit is set. Otherwise, the EVENT pin will not get de-asserted.
S
Register
01h
02h
03h
04h
22h
0
0
master sends a START bit,
ARA and a read command
Alert Response Address
Registers to be initialized
0
Default value
0000h
0000h
0000h
0000h
0000h
1
1
Rev. 04 — 2 February 2009
0
0
Example value
0209h
0550h
1F40h
05F0h
0000h
read
1
acknowledge
0
0
The last bit of slave address
Slave acknowledges and
sends its slave address.
0
is hard coded '0'.
DDR memory module temp sensor, 3.3 V
1
Description
Configuration register
Upper Boundary Alarm Trip register = 85 C
Lower Boundary Alarm Trip register = 20 C
Critical Alarm Trip register = 95 C
SMBus register = no change
device address
•
•
•
2
C-bus minimum bus speed is limited by
1
hysteresis = 1.5 C
EVENT output = Interrupt mode
EVENT output is enabled
A2
A1
not acknowledge
A0
0
sends a STOP bit
host NACK and
1
© NXP B.V. 2009. All rights reserved.
002aab330
STOP bit
P
SE98
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