SE98TK-T NXP Semiconductors, SE98TK-T Datasheet - Page 25

Board Mount Temperature Sensors I2C LOCAL +/- 2OC TS DIMM

SE98TK-T

Manufacturer Part Number
SE98TK-T
Description
Board Mount Temperature Sensors I2C LOCAL +/- 2OC TS DIMM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SE98TK-T

Temperature Threshold
+ 6 C
Full Temp Accuracy
+/- 4 C
Package / Case
SOT-908
Digital Output - Bus Interface
2-Wire, I2C
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 20 C
Output Type
Digital
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
SE98TK,118
NXP Semiconductors
9. Application design-in information
SE98_4
Product data sheet
9.1 SE98 in memory module application
In a typical application, the SE98 behaves as a slave device and interfaces to the master
(or host) via the SCL and SDA lines. The host monitors the EVENT output pin, which is
asserted when the temperature reading exceeds the programmed values in the alarm
registers. The A0, A1 and A2 pins are directly connected to the shared SPD’s A0, A1 and
A2 pins, otherwise they must be pulled HIGH or LOW. The SDA and SCL serial interface
pins are open-drain and require pull-up resistors, and are able to sink a maximum current
of 3 mA with a voltage drop less than 0.4 V. Typical pull-up values for SCL and SDA are
10 k , but the resistor values can be changed in order to meet the rise time requirement if
the capacitance load is too large due to routing, connectors, or multiple components
sharing the same bus.
Figure 13
centered in the memory module to provide the function to monitor the temperature of the
DRAM. In the event of overheat, the SE98 triggers the EVENT output and the memory
controller can throttle the memory bus to slow the DRAM, or the CPU can increase the
refresh rate for the DRAM. The memory controller can also read the SE98 and watch the
DRAM thermal behavior.
Fig 12. Typical application
Fig 13. System application
shows the SE98 being placed in the memory module application. The SE98 is
DIMM
DRAM
Rev. 04 — 2 February 2009
slave
A2
A0
A1
MEMORY CONTROLLER
SE98
V
V
DRAM
DD
SS
SMBus
SE98
EVENT
SDA
SCL
10 k
(3 )
DDR memory module temp sensor, 3.3 V
EVENT
DRAM
master
CONTROLLER
HOST
002aab282
DRAM
CPU
002aac804
© NXP B.V. 2009. All rights reserved.
SE98
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