STLC5046 STMicroelectronics, STLC5046 Datasheet - Page 34

IC CODEC/FLTR PROG QUAD 64-TQFP

STLC5046

Manufacturer Part Number
STLC5046
Description
IC CODEC/FLTR PROG QUAD 64-TQFP
Manufacturer
STMicroelectronics
Type
PCM Codec/Filterr
Datasheets

Specifications of STLC5046

Data Interface
PCM Audio Interface
Resolution (bits)
16 b
Number Of Adcs / Dacs
4 / 4
Sigma Delta
Yes
Voltage - Supply, Analog
3.3 V ~ 5 V
Voltage - Supply, Digital
3.3 V ~ 5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-3665

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Registers addresses
3.1.25
34/51
MD11..0=1: The corresponding I/O doesn’t generate interrupt.
MD11..0=0: The corresponding I/O (programmed as Input) generate interrupt if a change of
status is detected.
Input lines with persistency check generate interrupt if the changed status remains stable
longer than the time programmed in the persistency check registers PCHKA/B. Lines
without persistence check generate an immediate interrupt request.
Mask register has no effect on those pins configured as outputs, those pins will not generate
interrupt.
Pin-strap value.
Interrupt Mask register for CD port (CMASK)
Addr=1Eh; Reset Value=XFh
In MCU mode, dynamic I/O configuration, MCn bits are the disable/enable interrupt related
to the channel n:
MC3..0= 0 Any I/O line of the related channel is enabled to generate interrupt depending on
DMASK setting.
MC3..0=1 Any I/O line of the related channel is disabled to generate interrupt independently
of DMASK setting.
In MCU mode, static I/O configuration, MCn bits are the interrupt mask bits related to CSn
that are configured as I/O lines.
MC3..0=1: The corresponding I/O doesn’t generate interrupt.
MC3..0=0: The corresponding I/O generate interrupt if a change of status is detected.
Input lines with persistency check generate interrupt if the changed status remains stable
longer than the time programmed in the persistency check registers PCHKA/B
Lines without persistency check generate an immediate interrupt request.
Mask register has no effect on those pins configured as outputs, those pins will not generate
interrupt.
MD7
Bit7
1
MD6
Bit6
1
MD5
Bit5
1
Doc ID 7052 Rev 5
MD4
Bit4
1
MD11
MC3
MD3
Bit3
1
1
MD10
MD2
MC2
Bit2
1
1
MD1
MD9
MC1
Bit1
1
1
STLC5046
MD0
MD8
MC0
Bit0
1
1

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